公开(公告)号：US20200144365A1

公开(公告)日：2020-05-07

申请号：US16180486

申请日：2018-11-05

Applicant: GLOBALFOUNDRIES INC.

Inventor： George R. MULFINGER ,  Timothy J. MCARDLE ,  Judson R. HOLT ,  Steffen A. SICHLER ,  Ömür I. AYDIN ,  Wei HONG ,  Yi QI ,  Hui ZANG ,  Liu JIANG

IPC: H01L29/08 ,  H01L21/8238 ,  H01L29/06 ,  H01L21/28 ,  H01L29/423

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to faceted epitaxial source/drain regions and methods of manufacture. The structure includes: a gate structure over a substrate; an L-shaped sidewall spacer located on sidewalls of the gate structure and extending over the substrate adjacent to the gate structure; and faceted diffusion regions on the substrate, adjacent to the L-shaped sidewall spacer.

公开(公告)号：US20190013245A1

公开(公告)日：2019-01-10

申请号：US15643940

申请日：2017-07-07

Applicant: GLOBALFOUNDRIES INC.

Inventor： Ashish Kumar JHA ,  Haiting WANG ,  Wei HONG ,  Wei ZHAO ,  Tae Jeong LEE ,  Zhenyu HU

IPC: H01L21/8234 ,  H01L29/66 ,  H01L21/311 ,  H01L21/3213 ,  H01L21/02

CPC classification number: H01L29/7855 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/0228 ,  H01L21/0276 ,  H01L21/0337 ,  H01L21/31053 ,  H01L21/31111 ,  H01L21/31116 ,  H01L21/31144 ,  H01L21/32055 ,  H01L21/3212 ,  H01L21/32133 ,  H01L21/32139 ,  H01L21/475 ,  H01L21/823431 ,  H01L21/823437 ,  H01L21/823481 ,  H01L27/0207 ,  H01L27/0886 ,  H01L29/435 ,  H01L29/66484 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/7851 ,  H01L2027/11805 ,  H01L2027/11831 ,  H01L2029/7858

Abstract: A method of manufacturing a semiconductor device includes the formation of an oxide spacer layer to modify the critical dimension of a gate cut opening in connection with a replacement metal gate process. The oxide spacer layer is deposited after etching a gate cut opening in an overlying hard mask such that the oxide spacer layer is deposited onto sidewall surfaces of the hard mask within the opening and directly over the top surface of a sacrificial gate. The oxide spacer may also be deposited into recessed regions within an interlayer dielectric located adjacent to the sacrificial gate. By filling the recessed regions with an oxide, the opening of trenches through the oxide spacer layer and the interlayer dielectric to expose source/drain junctions can be simplified.