公开(公告)号：US20180026118A1

公开(公告)日：2018-01-25

申请号：US15174147

申请日：2016-07-22

Applicant: GLOBALFOUNDRIES INC.

Inventor： Nicolas L. Breil ,  Neal A. Makela ,  Praneet Adusumilli ,  Domingo A. Ferrer

IPC: H01L29/66 ,  H01L29/78 ,  H01L29/417 ,  H01L21/285 ,  H01L29/04 ,  H01L29/08

CPC classification number: H01L29/66795 ,  H01L21/2855 ,  H01L29/045 ,  H01L29/0847 ,  H01L29/41791 ,  H01L29/785 ,  H01L2029/7858

Abstract: During a physical vapor deposition (PVD) process, the ion energy of a depositing species is controlled. By varying the ion energy throughout the process, the degree of conformality of the deposited layer over three-dimensional structures, including the extent to which the deposited layer merges between adjacent structures can be controlled.

公开(公告)号：US20170148669A1

公开(公告)日：2017-05-25

申请号：US14948214

申请日：2015-11-20

Applicant: GLOBALFOUNDRIES INC.

Inventor： Vimal Kamineni ,  Mark V. Raymond ,  Praneet Adusumilli ,  Chengyu Niu

IPC: H01L21/768 ,  H01L23/522 ,  H01L29/78

CPC classification number: H01L23/535 ,  H01L21/28518 ,  H01L21/31116 ,  H01L21/67207 ,  H01L21/76802 ,  H01L21/76805 ,  H01L21/7684 ,  H01L21/76843 ,  H01L21/76895 ,  H01L23/5226 ,  H01L23/53266 ,  H01L23/53295 ,  H01L29/45 ,  H01L29/78

Abstract: Methods, apparatus, and systems for fabricating a semiconductor device comprising a semiconductor substrate; an oxide layer above the semiconductor substrate; a first metal component comprising tungsten disposed within the oxide layer; an interlayer dielectric (ILD) above the oxide layer, wherein the ILD comprises a trench and a bottom of the trench comprises at least a portion of the top of the first metal component; a barrier material disposed on sidewalls and the bottom of the trench; and a second metal component disposed in the trench.

公开(公告)号：US10304735B2

公开(公告)日：2019-05-28

申请号：US15630002

申请日：2017-06-22

Applicant: GLOBALFOUNDRIES INC.

Inventor： Keith Kwong Hon Wong ,  Wonwoo Kim ,  Praneet Adusumilli

IPC: H01L23/532 ,  H01L21/768 ,  H01L23/535 ,  H01L23/485

Abstract: A cobalt contact includes a dual silicide barrier layer. The barrier layer, which may be formed in situ, includes silicides of titanium and cobalt, and provides an effective adhesion layer between the cobalt contact and a conductive device region such as the source/drain junction of a semiconductor device, eliminating void formation during a metal anneal.

公开(公告)号：US10026693B2

公开(公告)日：2018-07-17

申请号：US15589829

申请日：2017-05-08

Applicant: GLOBALFOUNDRIES INC.

Inventor： Vimal Kamineni ,  Mark V. Raymond ,  Praneet Adusumilli ,  Chengyu Niu

IPC: H01L23/522 ,  H01L23/535 ,  H01L21/768 ,  H01L29/78 ,  H01L21/285 ,  H01L21/311 ,  H01L21/67 ,  H01L23/532 ,  H01L29/45

Abstract: Methods, apparatus, and systems for fabricating a semiconductor device comprising a semiconductor substrate; an oxide layer above the semiconductor substrate; a first metal component comprising tungsten disposed within the oxide layer; an interlayer dielectric (ILD) above the oxide layer, wherein the ILD comprises a trench and a bottom of the trench comprises at least a portion of the top of the first metal component; a barrier material disposed on sidewalls and the bottom of the trench; and a second metal component disposed in the trench.

公开(公告)号：US09859403B1

公开(公告)日：2018-01-02

申请号：US15174147

申请日：2016-07-22

Applicant: GLOBALFOUNDRIES INC.

Inventor： Nicolas L. Breil ,  Neal A. Makela ,  Praneet Adusumilli ,  Domingo A. Ferrer

IPC: H01L29/417 ,  H01L29/66 ,  H01L29/04 ,  H01L29/08 ,  H01L21/285 ,  H01L29/78

CPC classification number: H01L29/66795 ,  H01L21/2855 ,  H01L29/045 ,  H01L29/0847 ,  H01L29/41791 ,  H01L29/785 ,  H01L2029/7858

Abstract: During a physical vapor deposition (PVD) process, the ion energy of a depositing species is controlled. By varying the ion energy throughout the process, the degree of conformality of the deposited layer over three-dimensional structures, including the extent to which the deposited layer merges between adjacent structures can be controlled.

公开(公告)号：US20170243823A1

公开(公告)日：2017-08-24

申请号：US15589829

申请日：2017-05-08

Applicant: GLOBALFOUNDRIES INC.

Inventor： Vimal Kamineni ,  Mark V. Raymond ,  Praneet Adusumilli ,  Chengyu Niu

IPC: H01L23/535 ,  H01L29/45 ,  H01L21/67 ,  H01L21/285 ,  H01L21/311 ,  H01L23/532 ,  H01L21/768

CPC classification number: H01L23/535 ,  H01L21/28518 ,  H01L21/31116 ,  H01L21/67207 ,  H01L21/76802 ,  H01L21/76805 ,  H01L21/7684 ,  H01L21/76843 ,  H01L21/76895 ,  H01L23/5226 ,  H01L23/53266 ,  H01L23/53295 ,  H01L29/45 ,  H01L29/78

Abstract: Methods, apparatus, and systems for fabricating a semiconductor device comprising a semiconductor substrate; an oxide layer above the semiconductor substrate; a first metal component comprising tungsten disposed within the oxide layer; an interlayer dielectric (ILD) above the oxide layer, wherein the ILD comprises a trench and a bottom of the trench comprises at least a portion of the top of the first metal component; a barrier material disposed on sidewalls and the bottom of the trench; and a second metal component disposed in the trench.

公开(公告)号：US10699949B2

公开(公告)日：2020-06-30

申请号：US16379066

申请日：2019-04-09

Applicant: GLOBALFOUNDRIES INC.

Inventor： Keith Kwong Hon Wong ,  Wonwoo Kim ,  Praneet Adusumilli

IPC: H01L21/768 ,  H01L23/535 ,  H01L23/485 ,  H01L21/285 ,  H01L23/532

Abstract: A cobalt contact includes a dual silicide barrier layer. The barrier layer, which may be formed in situ, includes silicides of titanium and cobalt, and provides an effective adhesion layer between the cobalt contact and a conductive device region such as the source/drain junction of a semiconductor device, eliminating void formation during a metal anneal.

公开(公告)号：US10128151B2

公开(公告)日：2018-11-13

申请号：US15381826

申请日：2016-12-16

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Vimal Kamineni ,  James Kelly ,  Praneet Adusumilli ,  Oscar Van Der Straten ,  Balasubramanian Pranatharthiharan

IPC: H01L21/76 ,  H01L21/768 ,  H01L23/532

Abstract: Devices and methods of fabricating integrated circuit devices via cobalt fill metallization are provided. A method includes, for instance, providing an intermediate semiconductor device having at least one trench, forming at least one layer of semiconductor material on the device, depositing a first cobalt (Co) layer on the second layer, and performing an anneal reflow process on the device. Also provided are intermediate semiconductor devices. An intermediate semiconductor device includes, for instance, at least one trench formed within the device, the trench having a bottom portion and sidewalls, at least one layer of semiconductor material disposed on the device, a first cobalt (Co) layer disposed on the at least one layer of semiconductor material, wherein the at least one layer of semiconductor material includes at least a first semiconductor material and a second semiconductor material.

公开(公告)号：US09679807B1

公开(公告)日：2017-06-13

申请号：US14948214

申请日：2015-11-20

Applicant: GLOBALFOUNDRIES INC.

Inventor： Vimal Kamineni ,  Mark V. Raymond ,  Praneet Adusumilli ,  Chengyu Niu

IPC: H01L21/768 ,  H01L23/522 ,  H01L29/78

CPC classification number: H01L23/535 ,  H01L21/28518 ,  H01L21/31116 ,  H01L21/67207 ,  H01L21/76802 ,  H01L21/76805 ,  H01L21/7684 ,  H01L21/76843 ,  H01L21/76895 ,  H01L23/5226 ,  H01L23/53266 ,  H01L23/53295 ,  H01L29/45 ,  H01L29/78

Abstract: Methods, apparatus, and systems for fabricating a semiconductor device comprising a semiconductor substrate; an oxide layer above the semiconductor substrate; a first metal component comprising tungsten disposed within the oxide layer; an interlayer dielectric (ILD) above the oxide layer, wherein the ILD comprises a trench and a bottom of the trench comprises at least a portion of the top of the first metal component; a barrier material disposed on sidewalls and the bottom of the trench; and a second metal component disposed in the trench.

公开(公告)号：US20190237365A1

公开(公告)日：2019-08-01

申请号：US16379066

申请日：2019-04-09

Applicant: GLOBALFOUNDRIES INC.

Inventor： Keith Kwong Hon Wong ,  Wonwoo Kim ,  Praneet Adusumilli

IPC: H01L21/768 ,  H01L23/485 ,  H01L23/535

Abstract: A cobalt contact includes a dual silicide barrier layer. The barrier layer, which may be formed in situ, includes silicides of titanium and cobalt, and provides an effective adhesion layer between the cobalt contact and a conductive device region such as the source/drain junction of a semiconductor device, eliminating void formation during a metal anneal.