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公开(公告)号:US20160035728A1
公开(公告)日:2016-02-04
申请号:US14882308
申请日:2015-10-13
Applicant: GLOBALFOUNDRIES Inc.
Inventor: Ajey Poovannummoottil Jacob , Steven John Bentley , Murat Kerem Akarvardar , Jody Alan Fronheiser , Kangguo Cheng , Bruce B. Doris , Ali Khakifirooz , Toshiharu Nagumo
IPC: H01L27/092 , H01L29/66 , H01L21/8238 , H01L29/78
CPC classification number: H01L27/0924 , H01L21/823821 , H01L21/845 , H01L27/1211 , H01L29/66439 , H01L29/66795 , H01L29/785 , H01L29/7851
Abstract: Embodiments herein provide device isolation in a complimentary metal-oxide fin field effect transistor. Specifically, a semiconductor device is formed with a retrograde doped layer over a substrate to minimize a source to drain punch-through leakage. A set of high mobility channel fins is formed over the retrograde doped layer, each of the set of high mobility channel fins comprising a high mobility channel material (e.g., silicon or silicon-germanium). The retrograde doped layer may be formed using an in situ doping process or a counter dopant retrograde implant. The device may further include a carbon liner positioned between the retrograde doped layer and the set of high mobility channel fins to prevent carrier spill-out to the high mobility channel fins.
Abstract translation: 本文的实施例提供了在互补金属氧化物鳍片场效应晶体管中的器件隔离。 具体地,半导体器件在衬底上形成有逆向掺杂层以最小化源极到漏极穿通泄漏。 一组高迁移率通道散热片形成在逆向掺杂层上,该组高迁移率通道散热片中的每一个包括高迁移率通道材料(例如硅或硅 - 锗)。 逆向掺杂层可以使用原位掺杂工艺或反掺杂剂逆向植入来形成。 该装置还可以包括位于逆向掺杂层和一组高迁移率通道翅片之间的碳衬垫,以防止载流子溢出到高迁移率通道翅片。
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公开(公告)号:US20140361377A1
公开(公告)日:2014-12-11
申请号:US13914808
申请日:2013-06-11
Applicant: GLOBALFOUNDRIES Inc. , Renesas Electronics Corporation , International Business Machines Corporation
Inventor: Ajey Poovannummoottil Jacob , Steven John Bentley , Murat Kerem Akarvardar , Jody Alan Fronheiser , Kangguo Cheng , Bruce B. Doris , Ali Khakifirooz , Toshiharu Nagumo
IPC: H01L27/092 , H01L29/66
CPC classification number: H01L27/0924 , H01L21/823821 , H01L21/845 , H01L27/1211 , H01L29/66439 , H01L29/66795 , H01L29/785 , H01L29/7851
Abstract: Embodiments herein provide device isolation in a complimentary metal-oxide fin field effect transistor. Specifically, a semiconductor device is formed with a retrograde doped layer over a substrate to minimize a source to drain punch-through leakage. A set of high mobility channel fins is formed over the retrograde doped layer, each of the set of high mobility channel fins comprising a high mobility channel material (e.g., silicon or silicon-germanium). The retrograde doped layer may be formed using an in situ doping process or a counter dopant retrograde implant. The device may further include a carbon liner positioned between the retrograde doped layer and the set of high mobility channel fins to prevent carrier spill-out to the high mobility channel fins.
Abstract translation: 本文的实施例提供了在互补金属氧化物鳍片场效应晶体管中的器件隔离。 具体地,半导体器件在衬底上形成有逆向掺杂层以最小化源极到漏极穿通泄漏。 一组高迁移率通道散热片形成在逆向掺杂层上,该组高迁移率通道散热片中的每一个包括高迁移率通道材料(例如硅或硅 - 锗)。 逆向掺杂层可以使用原位掺杂工艺或反掺杂剂逆向植入来形成。 该装置还可以包括位于逆向掺杂层和一组高迁移率通道翅片之间的碳衬垫,以防止载流子溢出到高迁移率通道翅片。
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公开(公告)号:US20140353801A1
公开(公告)日:2014-12-04
申请号:US13906852
申请日:2013-05-31
Applicant: GLOBALFOUNDRIES Inc.
Inventor: Ajey P. Jacob , Murat K. Akarvardar , Steven J. Bentley , Toshiharu Nagumo , Kangguo Cheng , Bruce B. Doris , Ali Khakifirooz
IPC: H01L21/761 , H01L21/762 , H01L29/06
CPC classification number: H01L21/823821 , H01L21/02227 , H01L21/02532 , H01L21/0257 , H01L21/266 , H01L21/3086 , H01L21/761 , H01L21/76224 , H01L21/823878 , H01L29/0646 , H01L29/66795 , H01L29/7851
Abstract: Embodiments herein provide approaches for device isolation in a complimentary metal-oxide fin field effect transistor. Specifically, a semiconductor device is formed with a retrograde doped layer over a substrate to minimize a source to drain punch-through leakage. A set of replacement fins is formed over the retrograde doped layer, each of the set of replacement fins comprising a high mobility channel material (e.g., silicon, or silicon-germanium). The retrograde doped layer may be formed using an in situ doping process or a counter dopant retrograde implant. The device may further include a carbon liner positioned between the retrograde doped layer and the set of replacement fins to prevent carrier spill-out to the replacement fins.
Abstract translation: 本文的实施例提供了在互补金属氧化物鳍片场效应晶体管中的器件隔离的方法。 具体地,半导体器件在衬底上形成有逆向掺杂层以最小化源极到漏极穿通泄漏。 在逆向掺杂层上形成一组替代翅片,该组替换鳍片中的每一个包括高迁移率通道材料(例如,硅或硅 - 锗)。 逆向掺杂层可以使用原位掺杂工艺或反掺杂剂逆向植入来形成。 该装置还可以包括位于逆向掺杂层和该替代翅片组之间的碳衬垫,以防止载体溢出到置换翅片。
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4.
公开(公告)号:US09564486B2
公开(公告)日:2017-02-07
申请号:US14839378
申请日:2015-08-28
Applicant: International Business Machines Corporation , GLOBALFOUNDRIES Inc. , RENESAS ELECTRONICS CORPORATION
Inventor: Murat Kerem Akarvardar , Steven John Bentley , Kangguo Cheng , Bruce B. Doris , Jody Fronheiser , Ajey Poovannummoottil Jacob , Ali Khakifirooz , Toshiharu Nagumo
IPC: H01L27/092 , H01L29/06 , H01L27/088 , H01L21/762 , H01L21/8234 , H01L29/78
CPC classification number: H01L29/0653 , H01L21/76229 , H01L21/823431 , H01L21/823481 , H01L27/0886 , H01L27/0924 , H01L29/0649 , H01L29/785
Abstract: A method of forming a semiconductor structure includes forming a first isolation region between fins of a first group of fins and between fins of a second group of fins. The first a second group of fins are formed in a bulk semiconductor substrate. A second isolation region is formed between the first group of fins and the second group of fins, the second isolation region extends through a portion of the first isolation region such that the first and second isolation regions are in direct contact and a height above the bulk semiconductor substrate of the second isolation region is greater than a height above the bulk semiconductor substrate of the first isolation region.
Abstract translation: 形成半导体结构的方法包括在第一组鳍片的翅片之间以及在第二组鳍片的翅片之间形成第一隔离区域。 第一组翅片形成在体半导体衬底中。 第二隔离区域形成在第一散热片组和第二散热片组之间,第二隔离区域延伸穿过第一隔离区域的一部分,使得第一隔离区域和第二隔离区域直接接触并且高于主体 第二隔离区域的半导体衬底大于第一隔离区域的体半导体衬底上方的高度。
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公开(公告)号:US20150137308A1
公开(公告)日:2015-05-21
申请号:US14083571
申请日:2013-11-19
Applicant: International Business Machines Corporation , Renesas Electronics Corporation , GLOBALFOUNDRIES Inc.
Inventor: Murat Kerem Akarvardar , Steven John Bentley , Kangguo Cheng , Bruce B. Doris , Jody Fronheiser , Ajey Poovannummoottil Jacob , Ali Khakifirooz , Toshiharu Nagumo
IPC: H01L27/088 , H01L29/06 , H01L21/8234 , H01L21/762
CPC classification number: H01L29/0653 , H01L21/76229 , H01L21/823431 , H01L21/823481 , H01L27/0886 , H01L27/0924 , H01L29/0649 , H01L29/785
Abstract: A method of forming a semiconductor structure includes forming a first isolation region between fins of a first group of fins and between fins of a second group of fins. The first a second group of fins are formed in a bulk semiconductor substrate. A second isolation region is formed between the first group of fins and the second group of fins, the second isolation region extends through a portion of the first isolation region such that the first and second isolation regions are in direct contact and a height above the bulk semiconductor substrate of the second isolation region is greater than a height above the bulk semiconductor substrate of the first isolation region.
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公开(公告)号:US09190411B2
公开(公告)日:2015-11-17
申请号:US13914808
申请日:2013-06-11
Applicant: GLOBALFOUNDRIES Inc. , International Business Machines Corporation , Renesas Electronics Corporation
Inventor: Ajey Poovannummoottil Jacob , Steven John Bentley , Murat Kerem Akarvardar , Jody Alan Fronheiser , Kangguo Cheng , Bruce B. Doris , Ali Khakifirooz , Toshiharu Nagumo
IPC: H01L21/84 , H01L21/8238 , H01L27/092 , H01L27/12 , H01L29/66 , H01L29/78
CPC classification number: H01L27/0924 , H01L21/823821 , H01L21/845 , H01L27/1211 , H01L29/66439 , H01L29/66795 , H01L29/785 , H01L29/7851
Abstract: Embodiments herein provide device isolation in a complimentary metal-oxide fin field effect transistor. Specifically, a semiconductor device is formed with a retrograde doped layer over a substrate to minimize a source to drain punch-through leakage. A set of high mobility channel fins is formed over the retrograde doped layer, each of the set of high mobility channel fins comprising a high mobility channel material (e.g., silicon or silicon-germanium). The retrograde doped layer may be formed using an in situ doping process or a counter dopant retrograde implant. The device may further include a carbon liner positioned between the retrograde doped layer and the set of high mobility channel fins to prevent carrier spill-out to the high mobility channel fins.
Abstract translation: 本文的实施例提供了在互补金属氧化物鳍片场效应晶体管中的器件隔离。 具体地,半导体器件在衬底上形成有逆向掺杂层以最小化源极到漏极穿通泄漏。 一组高迁移率通道散热片形成在逆向掺杂层上,该组高迁移率通道散热片中的每一个包括高迁移率通道材料(例如硅或硅 - 锗)。 逆向掺杂层可以使用原位掺杂工艺或反掺杂剂逆向植入来形成。 该装置还可以包括位于逆向掺杂层和一组高迁移率通道翅片之间的碳衬垫,以防止载流子溢出到高迁移率通道翅片。
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公开(公告)号:US20150140761A1
公开(公告)日:2015-05-21
申请号:US14599873
申请日:2015-01-19
Applicant: GLOBALFOUNDRIES INC. , International Business Machines Corporation , Renesas Electronics Corporation
Inventor: Ajey Poovannummoottil Jacob , Murat Kerem Akarvardar , Steven Bentley , Toshiharu Nagumo , Kangguo Cheng , Bruce B. Doris , Ali Khakifirooz
IPC: H01L21/8238 , H01L21/762 , H01L21/266 , H01L21/02
CPC classification number: H01L21/823821 , H01L21/02227 , H01L21/02532 , H01L21/0257 , H01L21/266 , H01L21/3086 , H01L21/761 , H01L21/76224 , H01L21/823878 , H01L29/0646 , H01L29/66795 , H01L29/7851
Abstract: Embodiments herein provide approaches for device isolation in a complimentary metal-oxide fin field effect transistor. Specifically, a semiconductor device is formed with a retrograde doped layer over a substrate to minimize a source to drain punch-through leakage. A set of replacement fins is formed over the retrograde doped layer, each of the set of replacement fins comprising a high mobility channel material (e.g., silicon, or silicon-germanium). The retrograde doped layer may be formed using an in situ doping process or a counter dopant retrograde implant. The device may further include a carbon liner positioned between the retrograde doped layer and the set of replacement fins to prevent carrier spill-out to the replacement fins.
Abstract translation: 本文的实施例提供了在互补金属氧化物鳍片场效应晶体管中的器件隔离的方法。 具体地,半导体器件在衬底上形成有逆向掺杂层以最小化源极到漏极穿通泄漏。 在逆向掺杂层上形成一组替代翅片,该组替换鳍片中的每一个包括高迁移率通道材料(例如,硅或硅 - 锗)。 逆向掺杂层可以使用原位掺杂工艺或反掺杂剂逆向植入来形成。 该装置还可以包括位于逆向掺杂层和该替代翅片组之间的碳衬垫,以防止载体溢出到置换翅片。
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8.
公开(公告)号:US09324790B2
公开(公告)日:2016-04-26
申请号:US14083571
申请日:2013-11-19
Applicant: International Business Machines Corporation , GLOBALFOUNDRIES Inc. , Renesas Electronics Corporation
Inventor: Murat Kerem Akarvardar , Steven John Bentley , Kangguo Cheng , Bruce B. Doris , Jody Fronheiser , Ajey Poovannummoottil Jacob , Ali Khakifirooz , Toshiharu Nagumo
IPC: H01L21/762 , H01L27/088 , H01L29/06 , H01L21/8234 , H01L29/78 , H01L27/092
CPC classification number: H01L29/0653 , H01L21/76229 , H01L21/823431 , H01L21/823481 , H01L27/0886 , H01L27/0924 , H01L29/0649 , H01L29/785
Abstract: A method of forming a semiconductor structure includes forming a first isolation region between fins of a first group of fins and between fins of a second group of fins. The first a second group of fins are formed in a bulk semiconductor substrate. A second isolation region is formed between the first group of fins and the second group of fins, the second isolation region extends through a portion of the first isolation region such that the first and second isolation regions are in direct contact and a height above the bulk semiconductor substrate of the second isolation region is greater than a height above the bulk semiconductor substrate of the first isolation region.
Abstract translation: 形成半导体结构的方法包括在第一组鳍片的翅片之间以及在第二组鳍片的翅片之间形成第一隔离区域。 第一组翅片形成在体半导体衬底中。 第二隔离区域形成在第一散热片组和第二散热片组之间,第二隔离区域延伸穿过第一隔离区域的一部分,使得第一隔离区域和第二隔离区域直接接触并且高于主体 第二隔离区域的半导体衬底大于第一隔离区域的体半导体衬底上方的高度。
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公开(公告)号:US09305846B2
公开(公告)日:2016-04-05
申请号:US14599873
申请日:2015-01-19
Applicant: GLOBALFOUNDRIES INC. , International Business Machines Corporation , Renesas Electronics Corporation
Inventor: Ajey Poovannummoottil Jacob , Murat Kerem Akarvardar , Steven Bentley , Toshiharu Nagumo , Kangguo Cheng , Bruce B. Doris , Ali Khakifirooz
IPC: H01L21/762 , H01L29/06 , H01L29/66 , H01L21/8238 , H01L21/761 , H01L21/02 , H01L21/266 , H01L29/78
CPC classification number: H01L21/823821 , H01L21/02227 , H01L21/02532 , H01L21/0257 , H01L21/266 , H01L21/3086 , H01L21/761 , H01L21/76224 , H01L21/823878 , H01L29/0646 , H01L29/66795 , H01L29/7851
Abstract: Embodiments herein provide approaches for device isolation in a complimentary metal-oxide fin field effect transistor. Specifically, a semiconductor device is formed with a retrograde doped layer over a substrate to minimize a source to drain punch-through leakage. A set of replacement fins is formed over the retrograde doped layer, each of the set of replacement fins comprising a high mobility channel material (e.g., silicon, or silicon-germanium). The retrograde doped layer may be formed using an in situ doping process or a counter dopant retrograde implant. The device may further include a carbon liner positioned between the retrograde doped layer and the set of replacement fins to prevent carrier spill-out to the replacement fins.
Abstract translation: 本文的实施例提供了在互补金属氧化物鳍片场效应晶体管中的器件隔离的方法。 具体地,半导体器件在衬底上形成有逆向掺杂层以最小化源极到漏极穿通泄漏。 在逆向掺杂层上形成一组替代翅片,该组替换鳍片中的每一个包括高迁移率通道材料(例如,硅或硅 - 锗)。 逆向掺杂层可以使用原位掺杂工艺或反掺杂剂逆向植入来形成。 该装置还可以包括位于逆向掺杂层和该替代翅片组之间的碳衬垫,以防止载体溢出到置换翅片。
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10.
公开(公告)号:US20150372080A1
公开(公告)日:2015-12-24
申请号:US14839378
申请日:2015-08-28
Applicant: International Business Machines Corporation , GLOBALFOUNDRIES Inc. , RENESAS ELECTRONICS CORPORATION
Inventor: Murat Kerem Akarvardar , Steven John Bentley , Kangguo Cheng , Bruce B. Doris , Jody Fronheiser , Ajey Poovannummoottil Jacob , Ali Khakifirooz , Toshiharu Nagumo
IPC: H01L29/06 , H01L27/092
CPC classification number: H01L29/0653 , H01L21/76229 , H01L21/823431 , H01L21/823481 , H01L27/0886 , H01L27/0924 , H01L29/0649 , H01L29/785
Abstract: A method of forming a semiconductor structure includes forming a first isolation region between fins of a first group of fins and between fins of a second group of fins. The first a second group of fins are formed in a bulk semiconductor substrate. A second isolation region is formed between the first group of fins and the second group of fins, the second isolation region extends through a portion of the first isolation region such that the first and second isolation regions are in direct contact and a height above the bulk semiconductor substrate of the second isolation region is greater than a height above the bulk semiconductor substrate of the first isolation region.
Abstract translation: 形成半导体结构的方法包括在第一组鳍片的翅片之间以及在第二组鳍片的翅片之间形成第一隔离区域。 第一组翅片形成在体半导体衬底中。 第二隔离区域形成在第一散热片组和第二散热片组之间,第二隔离区域延伸穿过第一隔离区域的一部分,使得第一隔离区域和第二隔离区域直接接触并且高于主体 第二隔离区域的半导体衬底大于第一隔离区域的体半导体衬底上方的高度。
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