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    Junction field effect transistor (JFET) structure and methods to form same
    3.
    发明授权
    Junction field effect transistor (JFET) structure and methods to form same 有权

    公开(公告)号：US11094834B2

    公开(公告)日：2021-08-17

    申请号：US16790084

    申请日：2020-02-13

    Applicant: GLOBALFOUNDRIES U.S. Inc.

    Inventor： Qizhi Liu ,  Vibhor Jain ,  John J. Pekarik ,  Judson R. Holt

    IPC: H01L21/00 ,  H01L29/808 ,  H01L29/06 ,  H01L29/10 ,  H01L29/08 ,  H01L21/02 ,  H01L21/225 ,  H01L29/66

    Abstract: A junction field effect transistor (JFET) structure includes a doped polysilicon gate over a channel region of a semiconductor layer. The doped polysilicon gate has a first doping type. A raised epitaxial source is on the source region of the semiconductor layer and adjacent a first sidewall of the doped polysilicon gate, and has a second doping type opposite the first doping type. A raised epitaxial drain is on the drain region of the semiconductor layer and adjacent a second sidewall of the doped polysilicon gate, and has the second doping type. A doped semiconductor region is within the channel region of the semiconductor layer and extending from the source region to the drain region, and a non-conductive portion of the semiconductor layer is within the channel region to separate the doped semiconductor region from the doped polysilicon gate.

    HETEROJUNCTION BIPOLAR TRANSISTORS WITH AIRGAP ISOLATION
    4.
    发明申请
    HETEROJUNCTION BIPOLAR TRANSISTORS WITH AIRGAP ISOLATION 有权

    公开(公告)号：US20210091213A1

    公开(公告)日：2021-03-25

    申请号：US16748055

    申请日：2020-01-21

    Applicant: GLOBALFOUNDRIES U.S. Inc.

    Inventor： Vibhor Jain ,  John J. Pekarik ,  Qizhi Liu ,  Judson Holt

    IPC: H01L29/737 ,  H01L29/06 ,  H01L29/08 ,  H01L29/10 ,  H01L29/66

    Abstract: Structures for a heterojunction bipolar transistor and methods of forming a structure for a heterojunction bipolar transistor. A collector layer includes an inclined side surface, and a dielectric layer is positioned in a lateral direction adjacent to the inclined side surface of the collector layer. An intrinsic base is disposed over the collector layer, and an emitter is disposed over the intrinsic base. An airgap is positioned between the dielectric layer and the inclined side surface of the collector layer in the lateral direction, and an extrinsic base is positioned in the lateral direction adjacent to the intrinsic base. The extrinsic base is positioned over the airgap.

    Vertical bipolar junction transistor and method
    5.
    发明授权
    Vertical bipolar junction transistor and method 有权

    公开(公告)号：US11869941B2

    公开(公告)日：2024-01-09

    申请号：US17679166

    申请日：2022-02-24

    Applicant: GlobalFoundries U.S. Inc.

    Inventor： Sarah A. McTaggart ,  Rajendran Krishnasamy ,  Qizhi Liu

    IPC: H01L21/265 ,  H01L29/732 ,  H01L29/737 ,  H01L29/08 ,  H01L29/66

    CPC classification number: H01L29/0817 ,  H01L21/26586 ,  H01L29/66272 ,  H01L29/732 ,  H01L29/7371

    Abstract: Disclosed are a structure including a transistor and a method of forming the structure. The transistor includes an emitter region with first and second emitter portions. The first emitter portion extends through a dielectric layer. The second emitter portion is on the first emitter portion and the top of the dielectric layer. An additional dielectric layer covers the top of the second emitter portion. The second emitter portion and the dielectric and additional dielectric layers are wider than the first emitter portion. At least a section of the second emitter portion is narrower than the dielectric and additional dielectric layers, thereby creating cavities positioned vertically between edge portions of the dielectric and additional dielectric layers and positioned laterally adjacent to the second emitter portion. The cavities are filled with dielectric material or dielectric material blocks the side openings to the cavities creating pockets of air, of gas or under vacuum.

    OPTICAL ANTENNA WITH REFLECTIVE MATERIAL FOR PHOTONIC INTEGRATED CIRCUIT AND METHODS TO FORM SAME
    7.
    发明申请
    OPTICAL ANTENNA WITH REFLECTIVE MATERIAL FOR PHOTONIC INTEGRATED CIRCUIT AND METHODS TO FORM SAME 有权

    公开(公告)号：US20220404547A1

    公开(公告)日：2022-12-22

    申请号：US17354408

    申请日：2021-06-22

    Applicant: GLOBALFOUNDRIES U.S. Inc.

    Inventor： Yusheng Bian ,  Qizhi Liu

    IPC: G02B6/12 ,  G02B6/124 ,  G02B6/34

    Abstract: Embodiments of the disclosure provide an optical antenna for a photonic integrated circuit (PIC). The optical antenna includes a vertically oriented semiconductor waveguide with a first end on a semiconductor layer. The vertically oriented semiconductor waveguide includes a first sidewall and a second sidewall opposite the first sidewall. A reflective material is along the second sidewall of the vertically oriented semiconductor waveguide. A first plurality of grating protrusions extends from the first sidewall of the vertically oriented semiconductor waveguide.

    HETEROJUNCTION BIPOLAR TRANSISTORS WITH UNDERCUT EXTRINSIC BASE REGIONS
    8.
    发明申请
    HETEROJUNCTION BIPOLAR TRANSISTORS WITH UNDERCUT EXTRINSIC BASE REGIONS 有权

    公开(公告)号：US20220190145A1

    公开(公告)日：2022-06-16

    申请号：US17120916

    申请日：2020-12-14

    Applicant: GLOBALFOUNDRIES U.S. Inc.

    Inventor： Sarah McTaggart ,  Qizhi Liu ,  Vibhor Jain ,  Mark Levy ,  Paula Fisher ,  James R. Elliott

    IPC: H01L29/737 ,  H01L29/66

    Abstract: Device structures and fabrication methods for heterojunction bipolar transistors. Trench isolation regions are positioned in a semiconductor substrate to define active regions. A base layer includes first sections that are respectively positioned over the active regions and second sections that are respectively positioned over the trench isolation regions. Emitter fingers are respectively positioned on the first sections of the base layer. The first sections of the base layer include single-crystal semiconductor material, and the second sections of the base layer include polycrystalline semiconductor material. The second sections of the base layer are spaced in a vertical direction from the trench isolation regions to define a first cavity that extends about a perimeter of the base layer and second cavities that are connected to the first cavity.

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