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    PACKAGE-LEVEL NOISE FILTERING FOR EMI RFI MITIGATION
    1.
    发明申请
    PACKAGE-LEVEL NOISE FILTERING FOR EMI RFI MITIGATION 审中-公开

    公开(公告)号：US20200066658A1

    公开(公告)日：2020-02-27

    申请号：US16326084

    申请日：2016-09-29

    Applicant: Intel Corporation

    Inventor： Hao-Han HSU ,  Dong-Ho HAN ,  Steven C. WACHTMAN ,  Ryan K. KUHLMANN

    IPC: H01L23/64 ,  H01L23/552 ,  H01L23/498 ,  H01L21/48 ,  H01P1/20

    Abstract: A semiconductor package and a packaged electronic device are described. The semiconductor package has a foundation layer and a planar filtering circuit. The circuit is formed in the foundation layer to provide EMI/RFI mitigation. The circuit has one or more conductive traces that are patterned to form an equivalent circuit of inductors and capacitors. The one or more conductive traces include planar metal shapes, such as meanders, loops, inter-digital fingers, and patterned shapes, to reduce the z-height of the package. The packaged electronic device has a semiconductor die, a foundation layer, a motherboard, a package, and the circuit. The circuit removes undesirable interferences generated from the semiconductor die. The circuit has a z-height that is less than a z-height of solder balls used to attach the foundation layer to the motherboard. A method of forming a planar filtering circuit in a foundation layer is also described.

    Electronic computing device having self-shielding antenna
    2.
    发明申请
    Electronic computing device having self-shielding antenna 有权

    公开(公告)号：US20220294109A1

    公开(公告)日：2022-09-15

    申请号：US17754149

    申请日：2019-12-27

    Applicant: INTEL CORPORATION

    Inventor： Denica LARSEN ,  Dong-Ho HAN ,  Kwan Ho LEE ,  Shantanu KULKARNI ,  Jaejin LEE

    IPC: H01Q1/52 ,  H01Q1/24 ,  H01Q9/28 ,  H01Q9/42

    Abstract: An electronic computing device with a self-shielding antenna. An electronic computing device may include a frame, an antenna, and an antenna shielding. The frame includes a top cover and a bottom cover. Electronic components are included in a space formed between the top cover and the bottom cover. The antenna is for wireless transmission and reception and included in the frame near an edge of the frame. The antenna shielding is disposed around the antenna for providing electro-magnetic shielding from radio frequency (RE) noises generated from the electronic components included in the frame. The antenna shielding may be a metal wall disposed between the top cover and the bottom cover around the antenna. The frame may be a metallic frame and may include a cut-out in the top cover and the bottom cover above and below the antenna, and a non-metallic cover may be provided in the cut-out.

    ULTRA-LOW PROFILE PACKAGE SHIELDING TECHNIQUE USING MAGNETIC AND CONDUCTIVE LAYERS FOR INTEGRATED SWITCHING VOLTAGE REGULATOR
    3.
    发明申请
    ULTRA-LOW PROFILE PACKAGE SHIELDING TECHNIQUE USING MAGNETIC AND CONDUCTIVE LAYERS FOR INTEGRATED SWITCHING VOLTAGE REGULATOR 审中-公开

    公开(公告)号：US20190393165A1

    公开(公告)日：2019-12-26

    申请号：US16481031

    申请日：2017-03-30

    Applicant: Intel Corporation

    Inventor： Kaladhar RADHAKRISHNAN ,  Jaejin LEE ,  Hao-Han HSU ,  Chung-Hao J. CHEN ,  Dong-Ho HAN

    IPC: H01L23/552 ,  H01L23/498 ,  H01L25/18 ,  H05K1/18 ,  H01L21/48

    Abstract: Semiconductor packages and a method of forming a semiconductor package are described. The semiconductor package has a foundation layer, a conductive layer formed in the foundation layer, and a magnetic layer formed between the conductive and the foundation layer. The conductive layer and the magnetic layer are coupled to form a low-profile inductor shield. The semiconductor package also has a dielectric layer formed between the magnetic and foundation layer. The foundation layer is mounted between a motherboard and a semiconductor die, where the foundation layer is attached to the motherboard with solder balls. Accordingly, the low-profile inductor shield may include a z-height that is less than a z-height of the solder balls. The low-profile inductor shield may have solder pads that are coupled to the conductive layer. The foundation layer may include at least one of voltage regulator and inductor, where the inductor is located above the low-profile inductor shield.

    PACKAGE-LEVEL NOISE FILTERING FOR EMI RFI MITIGATION
    5.
    发明申请
    PACKAGE-LEVEL NOISE FILTERING FOR EMI RFI MITIGATION 有权

    公开(公告)号：US20210193598A1

    公开(公告)日：2021-06-24

    申请号：US17194006

    申请日：2021-03-05

    Applicant: Intel Corporation

    Inventor： Hao-Han HSU ,  Dong-Ho HAN ,  Steven C. WACHTMAN ,  Ryan K. KUHLMANN

    IPC: H01L23/64 ,  H01L21/48 ,  H01L23/498 ,  H01L23/552 ,  H01P1/20

    Abstract: A semiconductor package and a packaged electronic device are described. The semiconductor package has a foundation layer and a planar filtering circuit. The circuit is formed in the foundation layer to provide EMI/RFI mitigation. The circuit has one or more conductive traces that are patterned to form an equivalent circuit of inductors and capacitors. The one or more conductive traces include planar metal shapes, such as meanders, loops, inter-digital fingers, and patterned shapes, to reduce the z-height of the package. The packaged electronic device has a semiconductor die, a foundation layer, a motherboard, a package, and the circuit. The circuit removes undesirable interferences generated from the semiconductor die. The circuit has a z-height that is less than a z-height of solder balls used to attach the foundation layer to the motherboard. A method of forming a planar filtering circuit in a foundation layer is also described.

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