公开(公告)号：US12126103B2

公开(公告)日：2024-10-22

申请号：US17131686

申请日：2020-12-22

Applicant: Intel Corporation

Inventor： Feifei Cheng ,  Zhe Chen ,  Ahmet C. Durgun ,  Zhichao Zhang

IPC: H01R12/71 ,  H01R12/70 ,  H01R13/24 ,  H01R13/6585 ,  H01R13/6594 ,  H01R13/6597 ,  H01R33/76

CPC classification number: H01R12/714 ,  H01R12/7076 ,  H01R13/2407 ,  H01R13/6585 ,  H01R13/6594 ,  H01R13/6597 ,  H01R33/76 ,  H01R13/2471

Abstract: In an embodiment, a socket comprises a housing, where the housing is a dielectric material. In an embodiment, a shell passes through a thickness of the, where the shell is conductive. The socket may further comprise a plug within the shell, where the plug is a dielectric material, and where the plug has a bottom surface. In an embodiment, a pin passes through the thickness of the housing within an inner diameter of the shell, where the pin has a first portion with a first diameter and a second portion with a second diameter, and where the pin is conductive. In an embodiment, the socket further comprises a spring around the first portion of the pin, where a first end of the spring presses against the bottom surface, and where a second end of the spring presses against the second portion of the pin.

公开(公告)号：US20230023483A1

公开(公告)日：2023-01-26

申请号：US17954172

申请日：2022-09-27

Applicant: Intel Corporation

Inventor： Wesley Morgan ,  Feifei Cheng ,  Divya Pratap

IPC: G02B6/38

Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed to enable customization of pigtail lengths of optical connectors. Disclosed is an apparatus comprising an affixed fiber array unit plug including a first optical fiber, a detachable fiber array unit plug including a second optical fiber, the detachable fiber array unit plug to be removably coupled to the affixed fiber array unit plug, and guide pins to interface with both the detachable fiber array unit plug and the affixed fiber array unit plug when coupled together, the guide pins to facilitate alignment of the first optical fiber with the second optical fiber.

公开(公告)号：US09825387B2

公开(公告)日：2017-11-21

申请号：US15084726

申请日：2016-03-30

Applicant: Intel Corporation

Inventor： Feifei Cheng ,  Kuang C. Liu ,  Michael Garcia ,  Eric W. Buddrius ,  Kevin J. Ceurter ,  Jonathon Robert Carstens

IPC: H01R13/62 ,  H01R12/75 ,  H01R12/70 ,  H01R13/639

CPC classification number: H01R12/75 ,  H01R12/7023 ,  H01R12/774 ,  H01R13/639

Abstract: Embodiments of the present disclosure are directed to a linear edge connector assembly and corresponding bolster plate features for receiving and securing a linear edge connector assembly. Embodiments of the disclosure are directed to a linear edge connector assembly that includes a grooved and indented receiver that can receive a spring loaded ball on the bolster plate. In embodiments, the linear edge connector assembly can include a magnetic element to create a magnetic attraction to magnetic elements on the bolster plate, such as a press-fit ball or a U-shaped hardstop. In some embodiments, the linear edge connector assembly includes a screw or push pin that can be received by a receiver on the bolster plate. The receiver can include a thread or friction fit receiver.

公开(公告)号：US12176643B2

公开(公告)日：2024-12-24

申请号：US17033386

申请日：2020-09-25

Applicant: Intel Corporation

Inventor： Thomas Boyd ,  Feifei Cheng ,  Eric W. Buddrius ,  Mohanraj Prabhugoud

IPC: H01R12/91 ,  H01R12/70 ,  H01R12/71 ,  H01R12/88 ,  H05K7/10

Abstract: Embodiments disclosed herein include sockets and electronic packages with socket architectures. In an embodiment, a socket comprises a housing with a first surface and a second surface. In an embodiment, a plurality of interconnect pins pass through the housing. In an embodiment, an alignment hole is provided through the housing. In an embodiment, an alignment post extending out from the first surface of the housing is also provided.

公开(公告)号：US11158969B2

公开(公告)日：2021-10-26

申请号：US15916678

申请日：2018-03-09

Applicant: Intel Corporation

Inventor： Feifei Cheng ,  Emad Al-Momani ,  Ahmet Durgun ,  Kuang Liu

IPC: H01R3/00 ,  H01R12/72 ,  H05K3/30 ,  H05K7/10 ,  H01R12/70 ,  H01R12/85 ,  H01R12/88 ,  H01R24/60 ,  H01R107/00

Abstract: Apparatuses, systems and methods associated with connector design for mating with integrated circuit packages are disclosed herein. In embodiments, a connector for mating with an integrated circuit (IC) package may include a housing with a recess to receive a portion of the IC package and a contact coupled to the housing and that extends into the recess. The contact may include a main body that extends from the housing into the recess and a curved portion that extends from an end of the main body, wherein the curved portion loops back and contacts the main body. Other embodiments may be described and/or claimed.

公开(公告)号：US10109940B2

公开(公告)日：2018-10-23

申请号：US15377254

申请日：2016-12-13

Applicant: INTEL CORPORATION

Inventor： Thomas A. Boyd ,  Feifei Cheng ,  Donald T. Tran ,  Russell S. Aoki ,  Karumbu Meyyappan

IPC: H01R12/70 ,  H01R12/88

Abstract: Embodiments herein relate to port frames and connectors for direct connections to integrated circuit packages. In various embodiments, a port frame to receive a connector and maintain a connection between the connector and a computer processor package may include a protrusion to provide stable attachment of the port frame to a bolster frame, a first wall, a second wall opposite the first wall, a first detent in the first wall, and a second detent in the second wall where the connector is to be received between the first wall and the second wall, and where the first detent is to receive a first locking protrusion extending from the connector and the second detent is to receive a second locking protrusion extending from the connector. Other embodiments may be described and/or claimed.

公开(公告)号：US12127363B2

公开(公告)日：2024-10-22

申请号：US17033401

申请日：2020-09-25

Applicant: Intel Corporation

Inventor： Feifei Cheng ,  Thomas Boyd ,  Kuang Liu ,  Steven A. Klein ,  Daniel Neumann ,  Mohanraj Prabhugoud

IPC: H05K7/10 ,  H01R12/52

CPC classification number: H05K7/1069 ,  H01R12/523

Abstract: Embodiments disclosed herein include sockets and electronic packages with socket architectures. In an embodiment, a socket comprises a housing with a first surface and a second surface. In an embodiment, a plurality of interconnect pins pass through the housing. In an embodiment, an alignment hole is provided through the housing. In an embodiment, an alignment post extending out from the first surface of the housing is also provided.

公开(公告)号：US20220407254A1

公开(公告)日：2022-12-22

申请号：US17352103

申请日：2021-06-18

Applicant: Intel Corporation

Inventor： Zhichao Zhang ,  Zhe Chen ,  Steven A. Klein ,  Feifei Cheng ,  Srikant Nekkanty ,  Kemal Aygun ,  Michael E. Ryan ,  Pooya Tadayon

IPC: H01R12/72 ,  H01R43/16 ,  H01R13/17

Abstract: A microelectronic socket structure and a method of forming the same. The socket structure comprises: a socket structure housing defining a cavity therein; and an interconnection structure including: a contact element disposed at least in part within the cavity, and configured to be electrically coupled to a corresponding microelectronic package, the contact element corresponding to one of a signal contact element or a ground contact element; and a conductive structure disposed at least in part within the cavity, electrically coupled to the contact element, and having an outer contour that is non-conformal with respect to an outer contour of the contact element.

公开(公告)号：US20170288330A1

公开(公告)日：2017-10-05

申请号：US15084682

申请日：2016-03-30

Applicant: Intel Corporation

Inventor： Feifei Cheng ,  Kuang C. Liu ,  Michael Garcia ,  Eric W. Buddrius ,  Kevin J. Ceurter ,  Anthony P. Valpiani ,  Jonathon Robert Carstens

IPC: H01R12/75 ,  H01R12/70

Abstract: Embodiments of the disclosure are directed to a linear edge connector assembly for connecting to a substrate diving board of a mother board. The linear edge connector assembly can include an electrical interface to electrically connect the contacts on the diving board to one or more conducts of a cable bundle. The linear edge connector assembly can also include a retaining force mechanism. The retaining force mechanism can include a torsional spring, a spring loaded hooking mechanism, or a spring loaded cam and lever. In some embodiments, the linear edge connector can include a notch to receive a latch connected to a bolster plate on the mother board.

公开(公告)号：US20250102744A1

公开(公告)日：2025-03-27

申请号：US18476089

申请日：2023-09-27

Applicant: Intel Corporation

Inventor： Feifei Cheng ,  Kumar Abhishek Singh ,  Peter A. Williams ,  Ziyin Lin ,  Fan Fan ,  Yang Wu ,  Saikumar Jayaraman ,  Baris Bicen ,  Darren Vance ,  Anurag Tripathi ,  Divya Pratap ,  Stephanie J. Arouh

IPC: G02B6/42

Abstract: Technologies for fiber array unit (FAU) lid designs are disclosed. In one embodiment, channels in the lid allow for suction to be applied to fibers that the lid covers, pulling the fibers into place in a V-groove. The suction can hold the fibers in place as the fiber array unit is mated with a photonic integrated circuit (PIC) die. Additionally or alternatively, channels can be on pitch, allowing for pulling the FAU towards a PIC die as well as sensing the position and alignment of the FAU to the PIC die. In another embodiment, a warpage amount of a PIC die is characterized, and a FAU lid with a similar warpage is fabricated, allowing for the FAU to position fibers correctly relative to waveguides in the PIC die. In another embodiment, a FAU has an extended lid, which can provide fiber protection as well as position and parallelism tolerance control.