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公开(公告)号：US20210318742A1
公开(公告)日：2021-10-14
申请号：US17354821
申请日：2021-06-22
Applicant: Intel Corporation
Inventor： Dorit Shapira , Anand Enamandram , Daniel Cartagena , Krishnakanth Sistla , Jorge P. Rodriguez , Efraim Rotem , Nir Rosenzweig
IPC: G06F1/3206 , G06F1/3287 , G06F1/3296 , G06F1/324 , G06F1/3234
Abstract: An apparatus is provided, where the apparatus includes a plurality of components; a first sensing system to measure first power consumed by first one or more components of the plurality of components; a second sensing system to measure second power consumed by the apparatus; an analog-to-digital converter (ADC) to generate an identification (ID) that is representative of the second power consumed by the apparatus; and a controller to allocate power budget to one or more components of the plurality of components, based on the measurement of the first power and the ID.
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公开(公告)号：US20170038815A1
公开(公告)日：2017-02-09
申请号：US15331051
申请日：2016-10-21
Applicant: Intel Corporation
Inventor： Efraim Rotem , Nir Rosenzweig , Doron Rajwan , Nadav Shulman , Gal Leibovich , Tomer Ziv , Amit Gabai , Jorge P. Rodriguez , Jeffrey A. Carlson
CPC classification number: G06F1/324 , G05F1/10 , G06F1/28 , G06F1/3206 , H03L7/08 , Y02D10/126
Abstract: A method and apparatus for providing proactive current protection. In one embodiment, the method comprises: prior to transitioning to a new state for an integrated circuit (IC), calculating a sum of expected powers for a plurality of domains in the IC by calculating an expected current for each of the plurality of domains based on an individual domain frequency in the new state and multiplying the expected current with its associated voltage for each of the plurality of domains for the new state; comparing the sum to a power limit; and if the sum is greater than the power limit, then reducing the individual domain frequency associated with at least one domain in the plurality of domains to maintain the total instantaneous power of the IC below the power limit.
Abstract translation: 一种用于提供主动电流保护的方法和装置。 在一个实施例中，该方法包括：在转换到集成电路（IC）的新状态之前，通过针对多个域中的每个域计算预期电流来计算IC中多个域的预期功率之和 在新状态的单个域频率上，将预期电流与其相关联的电压乘以用于新状态的多个域中的每一个; 将总和与功率限制进行比较; 并且如果所述和大于所述功率极限，则减少与所述多个域中的至少一个域相关联的各个域频率，以将所述IC的总瞬时功率维持在所述功率极限以下。
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公开(公告)号：US20160179110A1
公开(公告)日：2016-06-23
申请号：US14579794
申请日：2014-12-22
Applicant: Intel Corporation
Inventor： Efraim Rotem , Nir Rosenzweig , Doron Rajwan , Nadav Shulman , Gal Leibovich , Tomer Ziv , Amit Gabai , Jorge P. Rodriguez , Jeffrey A. Carlson
CPC classification number: G06F1/324 , G05F1/10 , G06F1/28 , G06F1/3206 , H03L7/08 , Y02D10/126
Abstract: A method and apparatus for providing proactive current protection. In one embodiment, the method comprises: prior to transitioning to a new state for an integrated circuit (IC), calculating a sum of expected powers for a plurality of domains in the IC by calculating an expected current for each of the plurality of domains based on an individual domain frequency in the new state and multiplying the expected current with its associated voltage for each of the plurality of domains for the new state; comparing the sum to a power limit; and if the sum is greater than the power limit, then reducing the individual domain frequency associated with at least one domain in the plurality of domains to maintain the total instantaneous power of the IC below the power limit.
Abstract translation: 一种用于提供主动电流保护的方法和装置。 在一个实施例中，该方法包括：在转换到集成电路（IC）的新状态之前，通过针对多个域中的每个域计算预期电流来计算IC中多个域的预期功率之和 在新状态的单个域频率上，将预期电流与其相关联的电压乘以用于新状态的多个域中的每一个; 将总和与功率限制进行比较; 并且如果所述和大于所述功率极限，则减少与所述多个域中的至少一个域相关联的各个域频率，以将所述IC的总瞬时功率维持在所述功率极限以下。
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公开(公告)号：US09337661B2
公开(公告)日：2016-05-10
申请号：US13728171
申请日：2012-12-27
Applicant: INTEL CORPORATION
Inventor： Matthew Coakley , Alexander B. Uan-Zo-Li , Jorge P. Rodriguez , Basavaraj B. Astekar , Gary L. Bookhardt
CPC classification number: H02J4/00 , G06F1/1626 , G06F1/1632 , G06F1/263 , G06F3/0202 , H02J1/10 , H02J7/0063 , H02J7/007 , H02J7/34 , H02J9/06 , H02J2007/0067 , Y10T307/549
Abstract: An apparatus including a storage area to store instructions and a controller to control power in a first device based on the instructions. In operation, the controller generates one or more signals to combine power from a first power source and a second power source for a hybrid power operation. The controller is to generate the one or more signals based on a connection state of the first device, multiple connection states of the first device, a charge level of a battery of the first device, or a combination thereof.
Abstract translation: 一种装置，包括存储指令的存储区域和基于指令控制第一设备中的功率的控制器。 在操作中，控制器产生一个或多个信号以组合来自第一电源的电力和用于混合电力操作的第二电源。 控制器基于第一设备的连接状态，第一设备的多个连接状态，第一设备的电池的充电水平或其组合来生成一个或多个信号。
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公开(公告)号：US11989074B2
公开(公告)日：2024-05-21
申请号：US17354821
申请日：2021-06-22
Applicant: Intel Corporation
Inventor： Dorit Shapira , Anand Enamandram , Daniel Cartagena , Krishnakanth Sistla , Jorge P. Rodriguez , Efraim Rotem , Nir Rosenzweig
IPC: G06F1/32 , G06F1/3206 , G06F1/3234 , G06F1/324 , G06F1/3287 , G06F1/3296 , H03M1/12
CPC classification number: G06F1/3206 , G06F1/324 , G06F1/3243 , G06F1/3287 , G06F1/3296 , H03M1/12
Abstract: An apparatus is provided, where the apparatus includes a plurality of components; a first sensing system to measure first power consumed by first one or more components of the plurality of components; a second sensing system to measure second power consumed by the apparatus; an analog-to-digital converter (ADC) to generate an identification (ID) that is representative of the second power consumed by the apparatus; and a controller to allocate power budget to one or more components of the plurality of components, based on the measurement of the first power and the ID.
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Patent Agency Ranking
公开(公告)号：US20230315658A1
公开(公告)日：2023-10-05
申请号：US17711380
申请日：2022-04-01
Applicant: Intel Corporation
Inventor： Rob W. Sims , Aurelio Rodriguez Echevarria , Jorge P. Rodriguez , Phil R. Lehwalder , Sivasankarareddy Juturu , Stephen P. Eastman
IPC: G06F13/20
CPC classification number: G06F13/20 , G06F2213/40
Abstract: A power supply comprising a hardware interface having conductive contacts and conforming to a power supply design standard comprising a pin-out definition specifying that a first conductive contact is to be dedicated to communicating first information of a first type. The power supply comprises first, second, and third circuitry. The first circuitry is to determine the first information. The second circuitry is to determine second information of a second type, wherein the second type of information is other than the first type. The third circuitry is to send, via the first conductive contact, a communication comprising the first information and the second information. In embodiments, a PCB comprises a connector to couple the PCB to the power supply via an interconnect to be coupled to the hardware interface, and an IC to receive the communication, and identify the first and second information.
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公开(公告)号：US10468730B2
公开(公告)日：2019-11-05
申请号：US14866870
申请日：2015-09-26
Applicant: Intel Corporation
Inventor： Jorge P. Rodriguez , Alexander B. Uan-Zo-Li , Naoki Matsumura , Andrew Keates , James G. Hermerding, II
Abstract: Various embodiments may be generally directed to techniques for using an observed battery stress history to manage operation of a computing system component in a high power performance mode when powered by a battery. Various embodiments include techniques for tracking stresses to a battery. Various embodiments include techniques for comparing the battery stress history to a degradation baseline for the battery. Various embodiments include techniques for developing a degradation baseline for a battery including, for example, a degradation baseline based on expected stress to a battery and/or a degradation baseline based on a battery reliability model. Various embodiments include techniques for determining a battery stress surplus or deficit. Various embodiments include techniques for managing operation of a performance enhancing mode or high power performance mode of a computing system component based on the determined battery stress surplus or deficit.
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公开(公告)号：US09612643B2
公开(公告)日：2017-04-04
申请号：US14229864
申请日：2014-03-29
Applicant: Intel Corporation
Inventor： Alexander B. Uan-Zo-Li , Don J. Nguyen , Gang Ji , Philip R. Lehwalder , Jorge P. Rodriguez , Vasudevan Srinivasan
IPC: G06F1/32
CPC classification number: G06F1/3234 , G06F1/3206 , G06F1/3212 , G06F1/324 , G06F1/3243 , Y02D10/126 , Y02D10/152 , Y02D10/174
Abstract: Methods and apparatus relating to controlling processor slew rates based on battery charge state/level are described. In one embodiment, logic causes modification to a slew rate of a processor based on at least a charge level of a battery pack. Other embodiments are also disclosed and claimed.
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公开(公告)号：US09541991B2
公开(公告)日：2017-01-10
申请号：US13715810
申请日：2012-12-14
Applicant: INTEL CORPORATION
Inventor： Alexander B. Uan-Zo-Li , Jorge P. Rodriguez , Philip R. Lehwalder , Patrick K. Leung , James G. Hermerding, II , Vasudevan Srinivasan
CPC classification number: G06F1/3296 , G06F1/28 , G06F1/3212 , Y02D10/172 , Y02D10/174
Abstract: An apparatus may include first circuitry coupled to one or more platform components, the first circuitry operative to receive an unfiltered input voltage signal, compare a first voltage level of the unfiltered input voltage signal to a first reference voltage level, and generate a control signal operative to lower operation power of one or more of the one or more platform components when the first voltage level is less than the first reference voltage level.
Abstract translation: 装置可以包括耦合到一个或多个平台组件的第一电路，第一电路可操作以接收未滤波的输入电压信号，将未滤波的输入电压信号的第一电压电平与第一参考电压电平进行比较，并产生操作的控制信号 以当所述第一电压电平小于所述第一参考电压电平时降低所述一个或多个平台组件中的一个或多个的操作功率。
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公开(公告)号：US09477243B2
公开(公告)日：2016-10-25
申请号：US14579794
申请日：2014-12-22
Applicant: Intel Corporation
Inventor： Efraim Rotem , Nir Rosenzweig , Doron Rajwan , Nadav Shulman , Gal Leibovich , Tomer Ziv , Amit Gabai , Jorge P. Rodriguez , Jeffrey A. Carlson
CPC classification number: G06F1/324 , G05F1/10 , G06F1/28 , G06F1/3206 , H03L7/08 , Y02D10/126
Abstract: A method and apparatus for providing proactive current protection. In one embodiment, the method comprises: prior to transitioning to a new state for an integrated circuit (IC), calculating a sum of expected powers for a plurality of domains in the IC by calculating an expected current for each of the plurality of domains based on an individual domain frequency in the new state and multiplying the expected current with its associated voltage for each of the plurality of domains for the new state; comparing the sum to a power limit; and if the sum is greater than the power limit, then reducing the individual domain frequency associated with at least one domain in the plurality of domains to maintain the total instantaneous power of the IC below the power limit.
Abstract translation: 一种用于提供主动电流保护的方法和装置。 在一个实施例中，该方法包括：在转换到集成电路（IC）的新状态之前，通过针对多个域中的每个域计算预期电流来计算IC中多个域的预期功率之和 在新状态的单个域频率上，将预期电流与其相关联的电压乘以用于新状态的多个域中的每一个; 将总和与功率限制进行比较; 并且如果所述和大于所述功率极限，则减少与所述多个域中的至少一个域相关联的各个域频率，以将所述IC的总瞬时功率维持在所述功率极限以下。
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