Abstract:
Embodiments may include systems and methods for managing multiple ports of a computing interface. A computing device may include a connector with a power port and a data port. A connector manager may identify whether a port partner is coupled to the connector, identify an inquiry related to a status of the connector, where the inquiry may be received from a BIOS of the computing device. In addition, the connector manager may generate an indication of the status of the connector, and further transmit the indication of the status of the connector to the BIOS. A BIOS may identify that a data device coupled to the connector through a port partner is to be initialized, and further transmit to a connector manager an inquiry related to a status of the connector, before initializing the data device. Other embodiments may be described and/or claimed.
Abstract:
In one example, a system on a chip can include an embedded controller and a security controller that can detect, during an initialization process, a request for embedded controller firmware stored in block storage from the embedded controller via a transmission link. The security controller can also retrieve the embedded controller firmware stored in the block storage and transmit the embedded controller firmware to the embedded controller via the transmission link.
Abstract:
In some examples, a power delivery system includes a primary power path to provide power to a computing system. The power delivery system also includes a bypass power path. A port manager is to disable the primary power path and to enable the bypass power path in response to a dead battery condition.
Abstract:
In one example, a system on a chip can include an embedded controller and a security controller that can detect, during an initialization process, a request for embedded controller firmware stored in block storage from the embedded controller via a transmission link. The security controller can also retrieve the embedded controller firmware stored in the block storage and transmit the embedded controller firmware to the embedded controller via the transmission link.
Abstract:
An electronic device may be provided that includes a first controller, a second controller, and a bus to connect between the first controller and the second controller. The electronic device may also include a first signal line between the first controller and the second controller, and the first controller to provide a first signal on the first signal line to the second controller to wake up the second controller from a low power mode.
Abstract:
Embodiments may include systems and methods for managing multiple ports of a computing interface. A computing device may include a connector with a power port and a data port. A connector manager may identify whether a port partner is coupled to the connector, identify an inquiry related to a status of the connector, where the inquiry may be received from a BIOS of the computing device. In addition, the connector manager may generate an indication of the status of the connector, and further transmit the indication of the status of the connector to the BIOS. A BIOS may identify that a data device coupled to the connector through a port partner is to be initialized, and further transmit to a connector manager an inquiry related to a status of the connector, before initializing the data device. Other embodiments may be described and/or claimed.
Abstract:
An electronic device may be provided that includes a first controller, a second controller, and a bus to connect between the first controller and the second controller. The electronic device may also include a first signal line between the first controller and the second controller, and the first controller to provide a first signal on the first signal line to the second controller to wake up the second controller from a low power mode.
Abstract:
In some examples, a power delivery system includes a primary power path to provide power to a computing system. The power delivery system also includes a bypass power path. A port manager is to disable the primary power path and to enable the bypass power path in response to a dead battery condition.
Abstract:
A repair engine for a computing platform is separate from the repeatedly-rewritten storage components for software and firmware. For example, the repair engine may reside in ROM or hardware logic. Through dedicated connections to one or more controllers, the repair engine detects when any of the platform's dual-role ports (e.g., on-the-go USB ports) is connected to a host device. The repair engine responds by opening firmware-independent communication with the host device and supporting the downloading and execution (DnX) of a firmware image from the host. Because the communication is initiated independently of the firmware, even a catastrophic firmware failure is repairable without requiring a user to identify and use a specially modified port.
Abstract:
When power is provided through a USB-C cable from a source device to a sink device, a sudden connection or disconnection of the cable between the two devices may cause a sudden power surge or power drop in at least one of those devices, leading to other problems. To avoid this sudden event from causing potential damage or disruption to one of the devices, in some embodiments a CC pin in the cable is used to announce the impending connection/disconnection, and the device may throttle back its power consumption before power is actually applied to or removed from the power pins.