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公开(公告)号：US09880859B2
公开(公告)日：2018-01-30
申请号：US14226223
申请日：2014-03-26
Applicant: Intel Corporation
Inventor： Robert C. Swanson , Mallik Bulusu , Vincent J. Zimmer , Robert W. Cone , Robert B. Bahnsen
CPC classification number: G06F9/4416
Abstract: Technologies for managing image discovery includes a server controller to cause a server to enter a pre-boot state. The server controller communicates with the server while the server maintains the pre-boot state to determine identification data of the server in response to a transitioning the server to the pre-boot state. The server controller identifies a boot image of the server based on the identification data of the server and associates the server with the identified boot image.
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2.发明授权公开(公告)号：US09477564B2
公开(公告)日：2016-10-25
申请号：US14310835
申请日：2014-06-20
Applicant: INTEL CORPORATION
Inventor： Robert C. Swanson , Robert W. Cone , Malay Trivedi
CPC classification number: G06F11/2033 , G06F11/1428 , G06F11/2002 , G06F13/4027 , G06F13/4221 , G06F2201/845 , G06F2201/85
Abstract: Method and apparatus for dynamic Node healing in a Multi-Node environment. A multi-node platform controller hub (MN-PCH) is configured to support multiple nodes through use of dedicated interfaces and components and shared capabilities. Interfaces and components may be configured to be used by respective nodes, or may be configured to support enhanced resiliency as redundant primary and spare interfaces and components. In response to detecting a failing or failing primary interface or component, the MN-PCH automatically performs failover operations to replace the primary with the spare. Moreover, the failover operation is transparent to the operating systems running on the platform's nodes.
Abstract translation: 多节点环境中动态节点愈合的方法和装置。 多节点平台控制器集线器（MN-PCH）被配置为通过使用专用接口和组件以及共享功能来支持多个节点。 接口和组件可以被配置为由相应节点使用，或者可以被配置为支持作为冗余主要和备用接口和组件的增强的弹性。 为了响应检测到故障或故障的主接口或组件，MN-PCH自动执行故障切换操作，以将备用主机替换为备用。 此外，故障切换操作对于在平台节点上运行的操作系统是透明的。
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公开(公告)号：US09413765B2
公开(公告)日：2016-08-09
申请号：US14225140
申请日：2014-03-25
Applicant: INTEL CORPORATION
Inventor： Robert C. Swanson , Daniel Nemiroff , Vincent J. Zimmer , Mallik Bulusu , John R. Lindsley , Robert W. Cone , Malay Trivedi , Piotr Kwidzinski
CPC classification number: H04L63/10 , G06F3/0622 , G06F3/0637 , G06F3/0683 , G06F13/28 , G06F21/554 , G06F21/57 , G06F21/572
Abstract: Embodiments of multinode hubs for trust operations are disclosed herein. In some embodiments, a multinode hub may include a plurality of memory regions, a trapping module, and a trusted platform module (TPM) component. Each memory region may be associated with and receive trust operation data from a coherent computing node. The trapping module may generate trap notifications in response to accesses to the plurality of memory regions by the associated coherent computing nodes. The trap notifications may indicate which of the plurality of memory locations has been accessed, and the TPM component may process the trust operation data in a memory region indicated by a trap notification. Other embodiments may be disclosed and/or claimed.
Abstract translation: 本文公开了用于信任操作的多节点集线器的实施例。 在一些实施例中，多节点集线器可以包括多个存储器区域，陷阱模块和可信平台模块（TPM）组件。 每个存储器区域可以与相干计算节点相关联并接收来自相干计算节点的信任操作数据。 捕获模块可以响应于相关联的相干计算节点对多个存储器区域的访问而产生陷阱通知。 陷阱通知可以指示已经访问了多个存储器位置中的哪一个，并且TPM组件可以处理由陷阱通知指示的存储器区域中的信任操作数据。 可以公开和/或要求保护其他实施例。
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4.发明申请公开(公告)号：US20150370661A1
公开(公告)日：2015-12-24
申请号：US14310835
申请日：2014-06-20
Applicant: INTEL CORPORATION
Inventor： Robert C. Swanson , Robert W. Cone , Malay Trivedi
CPC classification number: G06F11/2033 , G06F11/1428 , G06F11/2002 , G06F13/4027 , G06F13/4221 , G06F2201/845 , G06F2201/85
Abstract: Method and apparatus for dynamic Node healing in a Multi-Node environment. A multi-node platform controller hub (MN-PCH) is configured to support multiple nodes through use of dedicated interfaces and components and shared capabilities. Interfaces and components may be configured to be used by respective nodes, or may be configured to support enhanced resiliency as redundant primary and spare interfaces and components. In response to detecting a failing or failing primary interface or component, the MN-PCH automatically performs failover operations to replace the primary with the spare. Moreover, the failover operation is transparent to the operating systems running on the platform's nodes.
Abstract translation: 多节点环境中动态节点愈合的方法和装置。 多节点平台控制器集线器（MN-PCH）被配置为通过使用专用接口和组件以及共享功能来支持多个节点。 接口和组件可以被配置为由相应节点使用，或者可以被配置为支持作为冗余主要和备用接口和组件的增强的弹性。 为了响应检测到故障或故障的主接口或组件，MN-PCH自动执行故障切换操作，以将备用主机替换为备用。 此外，故障切换操作对于在平台节点上运行的操作系统是透明的。
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公开(公告)号：US10073742B2
公开(公告)日：2018-09-11
申请号：US15178142
申请日：2016-06-09
Applicant: Intel Corporation
Inventor： Robert C. Swanson , Mariusz Oriol , Janusz Jurski , Piotr Sawicki , Robert W. Cone , William J. O'Sullivan , Mariusz Stepka , Babak Nikjou , Madhusudhan Rangarajan , Pawel Szymanski , Piotr Kwidzinski , Robert Bahnsen , Mallik Bulusu
CPC classification number: G06F11/142 , G06F1/3296 , G06F9/4881 , G06F9/5027 , G06F9/5088 , G06F11/14 , G06F11/2023 , G06F11/2028 , G06F11/203 , G06F11/2033 , G06F11/2035 , G06F11/2043 , G06F2201/805 , G06F2201/85
Abstract: Technologies for providing manageability redundancy for micro server and clustered System-on-a-Chip (SoC) deployments are presented. A configurable multi-processor apparatus may include multiple integrated circuit (IC) blocks where each IC block includes a task block to perform one or more assignable task functions and a management block to perform management functions with respect to the corresponding IC block. Each task block and each management block may include one or more instruction processors and corresponding memory. Each IC block may be controllable to perform a function of one or more other IC blocks. The IC blocks may communicate with each other via a management communication infrastructure that may include a communication path from each of the management blocks to each of the other management blocks. Via the management communication infrastructure, the management blocks may bridge communication paths between pairs of management blocks.
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Patent Agency Ranking
6.发明授权Manageability redundancy for micro server and clustered system-on-a-chip deployments 有权微服务器和群集系统级芯片部署的可管理性冗余公开(公告)号：US09367406B2
公开(公告)日：2016-06-14
申请号：US14125516
申请日：2013-08-14
Applicant: Intel Corporation
Inventor： Robert C. Swanson , Mariusz Oriol , Janusz Jurski , Piotr Sawicki , Robert W. Cone , William J. O'Sullivan , Mariusz Stepka , Babak Nikjou , Madhusudhan Rangarajan , Pawel Szymanski , Piotr Kwidzinski , Robert Bahnsen , Mallik Bulusu
CPC classification number: G06F11/142 , G06F1/3296 , G06F9/4881 , G06F9/5027 , G06F9/5088 , G06F11/14 , G06F11/2023 , G06F11/2028 , G06F11/203 , G06F11/2033 , G06F11/2035 , G06F11/2043 , G06F2201/805 , G06F2201/85
Abstract: Technologies for providing manageability redundancy for micro server and clustered System-on-a-Chip (SoC) deployments are presented. A configurable multi-processor apparatus may include multiple integrated circuit (IC) blocks where each IC block includes a task block to perform one or more assignable task functions and a management block to perform management functions with respect to the corresponding IC block. Each task block and each management block may include one or more instruction processors and corresponding memory. Each IC block may be controllable to perform a function of one or more other IC blocks. The IC blocks may communicate with each other via a management communication infrastructure that may include a communication path from each of the management blocks to each of the other management blocks. Via the management communication infrastructure, the management blocks may bridge communication paths between pairs of management blocks.
Abstract translation: 介绍了为微服务器和集群系统级芯片（SoC）部署提供可管理性冗余的技术。 可配置的多处理器装置可以包括多个集成电路（IC）块，其中每个IC块包括执行一个或多个可分配任务功能的任务块和用于执行相对于IC块的管理功能的管理块。 每个任务块和每个管理块可以包括一个或多个指令处理器和对应的存储器。 每个IC块可以是可控制的，以执行一个或多个其它IC块的功能。 IC块可以经由管理通信基础设施相互通信，管理通信基础设施可以包括从每个管理块到每个其他管理块的通信路径。 通过管理通信基础设施，管理块可以跨越管理块对之间的通信路径。
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公开(公告)号：US09781117B2
公开(公告)日：2017-10-03
申请号：US15204799
申请日：2016-07-07
Applicant: Intel Corporation
Inventor： Robert C. Swanson , Daniel Nemiroff , Vincent J. Zimmer , Mallik Bulusu , John R. Lindsley , Robert W. Cone , Malay Trivedi , Piotr Kwidzinski
CPC classification number: H04L63/10 , G06F3/0622 , G06F3/0637 , G06F3/0683 , G06F13/28 , G06F21/554 , G06F21/57 , G06F21/572
Abstract: Embodiments of multinode hubs for trust operations are disclosed herein. In some embodiments, a multinode hub may include a plurality of memory regions, a trapping module, and a trusted platform module (TPM) component. Each memory region may be associated with and receive trust operation data from a coherent computing node. The trapping module may generate trap notifications in response to accesses to the plurality of memory regions by the associated coherent computing nodes. The trap notifications may indicate which of the plurality of memory locations has been accessed, and the TPM component may process the trust operation data in a memory region indicated by a trap notification. Other embodiments may be disclosed and/or claimed.
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8.发明授权公开(公告)号：US09684457B2
公开(公告)日：2017-06-20
申请号：US14719234
申请日：2015-05-21
Applicant: INTEL CORPORATION
Inventor： Thanunathan Rangarajan , Eng Hun Ooi , Madhusudhan Rangarajan , Robert W. Cone , Nishi Ahuja
CPC classification number: G06F3/061 , G06F1/206 , G06F3/0625 , G06F3/0634 , G06F3/0653 , G06F3/0659 , G06F3/067 , G06F3/0689
Abstract: Provided are a computer readable storage media, method, and system for gathering sensed data from devices to manage host command transmission and cooling of the device. Host commands are retrieved from a host memory in a host to perform Input/Output operations with respect to a device. The retrieved host commands are transmitted to the device to perform the I/O operations of the host command. A monitor command is transmitted to obtain sensed data from the device while processing the host commands. A rate of transmitting the host commands is adjusted in response to determining that the sensed data received from the device in response to the monitor command satisfies a condition.
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公开(公告)号：US20160323284A1
公开(公告)日：2016-11-03
申请号：US15204799
申请日：2016-07-07
Applicant: Intel Corporation
Inventor： Robert C. Swanson , Daniel Nemiroff , Vincent J. Zimmer , Mallik Bulusu , John R. Lindsley , Robert W. Cone , Malay Trivedi , Piotr Kwidzinski
CPC classification number: H04L63/10 , G06F3/0622 , G06F3/0637 , G06F3/0683 , G06F13/28 , G06F21/554 , G06F21/57 , G06F21/572
Abstract: Embodiments of multinode hubs for trust operations are disclosed herein. In some embodiments, a multinode hub may include a plurality of memory regions, a trapping module, and a trusted platform module (TPM) component. Each memory region may be associated with and receive trust operation data from a coherent computing node. The trapping module may generate trap notifications in response to accesses to the plurality of memory regions by the associated coherent computing nodes. The trap notifications may indicate which of the plurality of memory locations has been accessed, and the TPM component may process the trust operation data in a memory region indicated by a trap notification. Other embodiments may be disclosed and/or claimed.
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公开(公告)号：US20160292038A1
公开(公告)日：2016-10-06
申请号：US15178142
申请日：2016-06-09
Applicant: Intel Corporation
Inventor： Robert C. Swanson , Mariusz Oriol , Janusz Jurski , Piotr Sawicki , Robert W. Cone , William J. O'Sullivan , Mariusz Stepka , Babak Nikjou , Madhusudhan Rangarajan , Pawel Szymanski , Piotr Kwidzinski , Robert Bahnsen , Mallik Bulusu
CPC classification number: G06F11/142 , G06F1/3296 , G06F9/4881 , G06F9/5027 , G06F9/5088 , G06F11/14 , G06F11/2023 , G06F11/2028 , G06F11/203 , G06F11/2033 , G06F11/2035 , G06F11/2043 , G06F2201/805 , G06F2201/85
Abstract: Technologies for providing manageability redundancy for micro server and clustered System-on-a-Chip (SoC) deployments are presented. A configurable multi-processor apparatus may include multiple integrated circuit (IC) blocks where each IC block includes a task block to perform one or more assignable task functions and a management block to perform management functions with respect to the corresponding IC block. Each task block and each management block may include one or more instruction processors and corresponding memory. Each IC block may be controllable to perform a function of one or more other IC blocks. The IC blocks may communicate with each other via a management communication infrastructure that may include a communication path from each of the management blocks to each of the other management blocks. Via the management communication infrastructure, the management blocks may bridge communication paths between pairs of management blocks.
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