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公开(公告)号：US20150185741A1
公开(公告)日：2015-07-02
申请号：US14548361
申请日：2014-11-20
Applicant: Intel Corporation
Inventor： Thanunathan Rangarajan , Rahul Khanna , Rafael De La Guardia Gonzalez , Minh T. Le
CPC classification number: G05D23/19 , G05B13/0275 , G05B15/02 , G05B2219/49216 , G06F1/206 , G06N5/048
Abstract: In an embodiment, a processor includes a fuzzy thermoelectric cooling (TEC) controller to: obtain a current TEC level associated with the processor; obtain a current fan power level associated with the processor; fuzzify the current TEC level to obtain a first fuzzy fan level; fuzzify the current fan power level to obtain a second fuzzy fan level; determine a new TEC power level based at least in part on the first fuzzy fan level, the second fuzzy fan level, and a plurality of fuzzy rules; and provide the new TEC power level to a TEC device associated with the processor, where the TEC device is to transfer heat from the processor to a heat sink. Other embodiments are described and claimed.
Abstract translation: 在一个实施例中，处理器包括：模糊热电冷却（TEC）控制器，用于：获得与处理器相关联的当前TEC电平; 获得与处理器相关联的当前风扇功率级; 模糊化目前的TEC等级，获得第一个模糊风扇等级; 模糊当前风扇功率水平，获得第二个模糊风扇等级; 至少部分地基于第一模糊风扇水平，第二模糊风扇水平和多个模糊规则来确定新的TEC功率水平; 并向与处理器相关联的TEC设备提供新的TEC功率级，其中TEC设备将热量从处理器传送到散热器。 描述和要求保护其他实施例。
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公开(公告)号：US10306420B2
公开(公告)日：2019-05-28
申请号：US15564708
申请日：2015-06-03
Applicant: Intel Corporation
Inventor： Shen Zhou , Zhijie Sheng , Thanunathan Rangarajan , Junjie Huang
Abstract: Embodiments of self-locating computing devices, systems, and methods are described. In some embodiments, a computing device may include a Wireless Credential Exchange Module (WCEM) to detect one or more location tags and a management engine, coupled to the WCEM, to retrieve information of the one or more location tags from the WCEM, and to provide an asset management server with an identifier of the computing device and the information of the one or more location tags or location information of the computing device. Other embodiments may be described and/or claimed.
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3.发明授权公开(公告)号：US09684457B2
公开(公告)日：2017-06-20
申请号：US14719234
申请日：2015-05-21
Applicant: INTEL CORPORATION
Inventor： Thanunathan Rangarajan , Eng Hun Ooi , Madhusudhan Rangarajan , Robert W. Cone , Nishi Ahuja
CPC classification number: G06F3/061 , G06F1/206 , G06F3/0625 , G06F3/0634 , G06F3/0653 , G06F3/0659 , G06F3/067 , G06F3/0689
Abstract: Provided are a computer readable storage media, method, and system for gathering sensed data from devices to manage host command transmission and cooling of the device. Host commands are retrieved from a host memory in a host to perform Input/Output operations with respect to a device. The retrieved host commands are transmitted to the device to perform the I/O operations of the host command. A monitor command is transmitted to obtain sensed data from the device while processing the host commands. A rate of transmitting the host commands is adjusted in response to determining that the sensed data received from the device in response to the monitor command satisfies a condition.
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公开(公告)号：US20160048347A1
公开(公告)日：2016-02-18
申请号：US14460533
申请日：2014-08-15
Applicant: Intel Corporation
Inventor： Thanunathan Rangarajan , Vinayak P. Risbud , Tabassum Yasmin
IPC: G06F3/06
CPC classification number: G06F1/206 , G06F11/3037 , G06F11/3058 , G11C5/04 , G11C7/04 , G11C29/20 , G11C29/46 , G11C29/52 , G11C29/76 , G11C2029/0407 , G11C2029/0409 , Y02D10/16
Abstract: In an embodiment, a processor includes at least one core to execute instructions and a memory controller coupled to the at least one core. In turn, the memory controller includes a spare logic to cause a dynamic transfer of data stored on a first memory device coupled to the processor to a second memory device coupled to the processor, responsive to a temperature of the first memory device exceeding a thermal threshold. Other embodiments are described and claimed.
Abstract translation: 在一个实施例中，处理器包括执行指令的至少一个核和耦合到所述至少一个核的存储器控制器。 反过来，存储器控制器包括备用逻辑，用于响应于第一存储器件的温度超过热阈值，将存储在耦合到处理器的第一存储器件上的数据的动态传输耦合到耦合到处理器的第二存储器件 。 描述和要求保护其他实施例。
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公开(公告)号：US20190138379A1
公开(公告)日：2019-05-09
申请号：US16235949
申请日：2018-12-28
Applicant: Intel Corporation
Inventor： Thanunathan Rangarajan
Abstract: A method and system for storing hints in poisoned data of a computer system memory includes receiving poisoned data in a component of the system; forwarding the poisoned data to a memory controller of the system; and forwarding additional data regarding the poisoned data to a memory controller. The memory controller writes the poisoned data to the system memory wherein the written poisoned data includes a poison signature and a hint based on the additional data regarding the poisoned data; and when the written poisoned data is read signaling a system error and returning the poison signature and the hint to a system software of the system.
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Patent Agency Ranking
公开(公告)号：US10169268B2
公开(公告)日：2019-01-01
申请号：US15270151
申请日：2016-09-20
Applicant: Intel Corporation
Inventor： Mahesh Natu , Thanunathan Rangarajan , Gautam Doshi , Shamanna M. Datta , Baskaran Ganesan , Mohan J. Kumar , Rajesh S. Parthasarathy , Frank Binns , Rajesh Nagaraja Murthy , Robert C. Swanson
Abstract: In one embodiment, the present invention includes a processor that has an on-die storage such as a static random access memory to store an architectural state of one or more threads that are swapped out of architectural state storage of the processor on entry to a system management mode (SMM). In this way communication of this state information to a system management memory can be avoided, reducing latency associated with entry into SMM. Embodiments may also enable the processor to update a status of executing agents that are either in a long instruction flow or in a system management interrupt (SMI) blocked state, in order to provide an indication to agents inside the SMM. Other embodiments are described and claimed.
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公开(公告)号：US20180143923A1
公开(公告)日：2018-05-24
申请号：US15873089
申请日：2018-01-17
Applicant: Intel Corporation
Inventor： Mahesh Natu , Thanunathan Rangarajan , Gautam Doshi , Shamanna M. Datta , Baskaran Ganesan , Mohan J. Kumar , Rajesh S. Parthasarathy , Frank Binns , Rajesh Nagaraja Murthy , Robert C. Swanson
CPC classification number: G06F13/24 , G06F9/30101 , G06F9/3017 , G06F9/30189 , G06F9/3851 , G06F9/461 , G11C7/1072 , G11C11/40615
Abstract: In one embodiment, the present invention includes a processor that has an on-die storage such as a static random access memory to store an architectural state of one or more threads that are swapped out of architectural state storage of the processor on entry to a system management mode (SMM). In this way communication of this state information to a system management memory can be avoided, reducing latency associated with entry into SMM. Embodiments may also enable the processor to update a status of executing agents that are either in a long instruction flow or in a system management interrupt (SMI) blocked state, in order to provide an indication to agents inside the SMM. Other embodiments are described and claimed.
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公开(公告)号：US09297559B2
公开(公告)日：2016-03-29
申请号：US14036655
申请日：2013-09-25
Applicant: Intel Corporation
Inventor： Thanunathan Rangarajan , Rahul Khanna , Richard Marian Thomaiyar , Minh T Le
CPC classification number: F25B21/02 , G06F1/206 , G06F1/324 , G06F1/3287 , G06F1/3296 , Y02D10/126 , Y02D10/171 , Y02D10/172
Abstract: In an embodiment, a processor includes a thermoelectric cooling (TEC) controller to obtain a platform cooling level associated with the processor; obtain a temperature associated with the processor; calculate a TEC power level based at least in part on the platform cooling level and the temperature; and provide the TEC power level to a TEC device associated with the processor, wherein the TEC device is to transfer heat from the processor to a heat sink. Other embodiments are described and claimed.
Abstract translation: 在一个实施例中，处理器包括热电冷却（TEC）控制器，以获得与处理器相关联的平台冷却水平; 获得与处理器相关联的温度; 至少部分基于平台冷却水平和温度计算TEC功率水平; 并且向与处理器相关联的TEC设备提供TEC功率级，其中TEC设备将热量从处理器传送到散热器。 描述和要求保护其他实施例。
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公开(公告)号：US09990016B2
公开(公告)日：2018-06-05
申请号：US15674594
申请日：2017-08-11
Applicant: Intel Corporation
Inventor： Thanunathan Rangarajan , Vinayak P. Risbud , Tabassum Yasmin
CPC classification number: G06F1/206 , G06F11/3037 , G06F11/3058 , G11C5/04 , G11C7/04 , G11C29/20 , G11C29/46 , G11C29/52 , G11C29/76 , G11C2029/0407 , G11C2029/0409 , Y02D10/16
Abstract: In an embodiment, a processor includes at least one core to execute instructions and a memory controller coupled to the at least one core. In turn, the memory controller includes a spare logic to cause a dynamic transfer of data stored on a first memory device coupled to the processor to a second memory device coupled to the processor, responsive to a temperature of the first memory device exceeding a thermal threshold. Other embodiments are described and claimed.
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公开(公告)号：US09857809B2
公开(公告)日：2018-01-02
申请号：US14548361
申请日：2014-11-20
Applicant: Intel Corporation
Inventor： Thanunathan Rangarajan , Rahul Khanna , Rafael De La Guardia Gonzalez , Minh T. Le
CPC classification number: G05D23/19 , G05B13/0275 , G05B15/02 , G05B2219/49216 , G06F1/206 , G06N5/048
Abstract: In an embodiment, a processor includes a fuzzy thermoelectric cooling (TEC) controller to: obtain a current TEC level associated with the processor; obtain a current fan power level associated with the processor; fuzzify the current TEC level to obtain a first fuzzy fan level; fuzzify the current fan power level to obtain a second fuzzy fan level; determine a new TEC power level based at least in part on the first fuzzy fan level, the second fuzzy fan level, and a plurality of fuzzy rules; and provide the new TEC power level to a TEC device associated with the processor, where the TEC device is to transfer heat from the processor to a heat sink. Other embodiments are described and claimed.
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