-
公开(公告)号:US11302573B2
公开(公告)日:2022-04-12
申请号:US16592933
申请日:2019-10-04
Applicant: International Business Machines Corporation
Inventor: Ekmini Anuja De Silva , Ashim Dutta , Praveen Joseph , Nelson Felix
IPC: H01L23/00 , H01L21/768 , H01L23/522 , H01L23/532
Abstract: A method of forming a semiconductor structure includes forming one or more interconnect lines, the one or more interconnect lines including trenches of a first metal material surrounded by a first interlayer dielectric layer. The method also includes forming pillars of a second metal material different than the first metal material over the one or more interconnect lines utilizing a metal on metal growth process, and forming an etch stop dielectric layer, the pillars of the second metal material shaping the etch stop dielectric layer. The method further includes forming one or more vias to the one or more interconnect lines, the one or more vias being fully aligned to the one or more interconnect lines using the etch stop dielectric layer.
-
公开(公告)号:US11226561B2
公开(公告)日:2022-01-18
申请号:US16101411
申请日:2018-08-11
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor: Chi-Chun Liu , Indira Seshadri , Kristin Schmidt , Nelson Felix , Daniel Sanders , Jing Guo , Ekmini Anuja De Silva , Hoa Truong
Abstract: A self-priming resist may be formed from a first random copolymer forming a resist and a polymer brush having the general formula poly(A-r-B)-C-D, wherein A is a first polymer unit, B is a second polymer unit, wherein A and B are the same or different polymer units, C is a cleavable unit, D is a grafting group and r indicates that poly(A-r-B) is a second random copolymer formed from the first and second polymer units. The first random copolymer may be the same or different from the second random polymer. The self-priming resist can create a one-step method for forming an adhesion layer and resist by using the resist/brush blend.
-
公开(公告)号:US20210325784A1
公开(公告)日:2021-10-21
申请号:US16851034
申请日:2020-04-16
Applicant: International Business Machines Corporation
Inventor: Abraham Arceo de la Pena , Jennifer Church , Nelson Felix , Ekmini Anuja De Silva
Abstract: An exemplary semiconductor fabrication stack includes underlying layers; an organic planarization layer atop the underlying layers; a metal oxide hardmask atop the organic planarization layer and doped with both carbon and nitrogen; and an organic photoresist directly atop the doped metal oxide hardmask. In one or more embodiments, the doped metal oxide hardmask exhibits a water contact angle of greater than 80°.
-
公开(公告)号:US11054250B2
公开(公告)日:2021-07-06
申请号:US15950271
申请日:2018-04-11
Applicant: International Business Machines Corporation
Inventor: Gangadhara Raja Muthinti , Chiew-Seng Koay , Siva Kanakasabapathy , Nelson Felix
IPC: G01B11/27
Abstract: An overlay metrology system includes a multi-channel energy unit that selectively operates in a first mode to deliver first photons having a first wavelength to an object under test, and a second mode to deliver second photons to the object under test. The second photons have a second wavelength different from the first wavelength. The overlay metrology system further includes an electronic controller that selectively activates either the first mode or the second mode based at least in part on at least one characteristic of an object under test, and that generates the first protons or the second photons to detect at least one buried structure included in the object under test.
-
公开(公告)号:US20200051872A1
公开(公告)日:2020-02-13
申请号:US16059319
申请日:2018-08-09
Applicant: International Business Machines Corporation
Inventor: Jing Guo , Ekmini A. De Silva , Nicolas Loubet , Indira Seshadri , Nelson Felix
IPC: H01L21/8238 , H01L21/8234 , H01L21/768 , H01L27/108
Abstract: Methods are presented for forming multi-threshold field effect transistors. The methods generally include depositing and patterning an organic planarizing layer to protect underlying structures formed in a selected one of the nFET region and the pFET region of a semiconductor wafer. In the other one of the nFET region and the pFET region, structures are processed to form an undercut in the organic planarizing layer. The organic planarizing layer is subjected to a reflow process to fill the undercut. The methods are effective to protect a boundary between the nFET region and the pFET region.
-
公开(公告)号:US20200033733A1
公开(公告)日:2020-01-30
申请号:US16044629
申请日:2018-07-25
Applicant: International Business Machines Corporation
Inventor: Luciana Meli Thompson , Ekmini A. De Silva , Yasir Sulehria , Nelson Felix
IPC: G03F7/20 , G03F7/16 , C23C16/30 , C23C16/40 , C23C16/455 , C23C16/56 , H01L21/027 , H01L21/02 , H01L21/67
Abstract: Methods for post-lithographic inspection using an e-beam inspection tool of organic extreme ultraviolet sensitive (EUV) sensitive photoresists generally includes conformal deposition of a removable metal carboxide or metal carboxynitride onto the relief image. The conformal deposition of the metal carboxide or metal carboxynitride includes a low temperature vapor deposition process of less than about 100° C. to provide a coating thickness of less than about 5 nanometers. Subsequent to e-beam inspection, the metal carboxide or metal carboxynitride coating is removed using a wet stripping process. Once stripped, the wafer can continue on to further process fabrication without being a sacrificial wafer.
-
公开(公告)号:US10545409B1
公开(公告)日:2020-01-28
申请号:US16426805
申请日:2019-05-30
Applicant: International Business Machines Corporation
Inventor: Cody John Murray , Ekmini Anuja De Silva , Alex Richard Hubbard , Karen Elizabeth Petrillo , Nelson Felix
IPC: G03F7/40 , G03F7/38 , H01L21/027
Abstract: A method of optimizing a lithographic process for semiconductor fabrication includes determining that a semiconductor wafer experienced a photoresist exposure delay. At least one operating parameter of a post exposure baking process is adjusted based on the semiconductor wafer having experienced the photoresist exposure delay. The post exposure baking process is performed on the semiconductor wafer utilizing the adjusted at least one operating parameter.
-
公开(公告)号:US20190316900A1
公开(公告)日:2019-10-17
申请号:US15950271
申请日:2018-04-11
Applicant: International Business Machines Corporation
Inventor: Gangadhara Raja Muthinti , Chiew-seng Koay , Siva Kanakasabapathy , Nelson Felix
IPC: G01B11/27
Abstract: An overlay metrology system includes a multi-channel energy unit that selectively operates in a first mode to deliver first photons having a first wavelength to an object under test, and a second mode to deliver second photons to the object under test. The second photons have a second wavelength different from the first wavelength. The overlay metrology system further includes an electronic controller that selectively activates either the first mode or the second mode based at least in part on at least one characteristic of an object under test, and that generates the first protons or the second photons to detect at least one buried structure included in the object under test.
-
公开(公告)号:US20190271913A1
公开(公告)日:2019-09-05
申请号:US15911320
申请日:2018-03-05
Applicant: International Business Machines Corporation
Inventor: Ekmini A. De Silva , Rudy J. Wojtecki , Dario Goldfarb , Daniel P. Sanders , Nelson Felix
Abstract: Photoactive polymer brush materials and methods for EUV photoresist patterning using the photoactive polymer brush materials are described. The photoactive polymer brush material incorporates a grafting moiety that can be immobilized at the substrate surface, a dry developable or ashable moiety, and a photoacid generator moiety, which are bound to a polymeric backbone. The photoacid generator moiety generates an acid upon exposure to EUV radiation acid at the interface, which overcomes the acid depletion problem to reduce photoresist scumming. The photoacid generator moiety can also facilitate cleavage of the photoactive polymer brush material from the substrate via an optional acid cleavable grafting functionality for the grafting moiety. The dry developable or ashable moiety facilitates complete removal of the photoactive brush material from the substrate in the event there is residue present subsequent to development of the chemically amplified EUV photoresist.
-
公开(公告)号:US20190065634A1
公开(公告)日:2019-02-28
申请号:US15684006
申请日:2017-08-23
Applicant: International Business Machines Corporation
Inventor: Ravi K. Bonam , Nelson Felix , Scott Halle , Luciana Meli
IPC: G06F17/50
CPC classification number: G06F17/505 , G06F17/5081 , G06F2217/08 , G06F2217/14 , H01J37/32009
Abstract: A method comprises: defining a set of rules for an inspection and detection of a defect in two or more electronic devices on a semiconductor chip, the set of rules being based on a modulation transfer function providing a response as contrast versus spatial frequency of the pattern spacings of the two or more electronic devices on the semiconductor chip; generating two or more care areas for two or more pattern spacings of the electronic devices on the semiconductor chip using a hierarchical set of spacing rules; and inspecting the two or more pattern spacings of the electronic devices on the semiconductor chip for defects.
-
-
-
-
-
-
-
-
-