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公开(公告)号:US20250102422A1
公开(公告)日:2025-03-27
申请号:US18830121
申请日:2024-09-10
Applicant: Infineon Technologies AG
Inventor: Michael Hauff , David Tumpold , Tobias Mittereder , Mohammadamir Ghaderi , Stefan Hampl , Alfred Sigl , Sebastian Schwagerl
Abstract: In accordance with an embodiment, a semiconductor device includes: a radiator comprising a radiation layer configured to radiate an electromagnetic wave; a detector comprising a detection layer configured to detect the electromagnetic wave; a substrate; and an interface layer arranged between the radiator or the detector and the substrate, where a thermal conductivity of the radiator or the detector is different from a thermal conductivity of the interface layer.
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公开(公告)号:US20210017019A1
公开(公告)日:2021-01-21
申请号:US17065156
申请日:2020-10-07
Applicant: Infineon Technologies AG
Inventor: Alfred Sigl , Wolfgang Friza , Stefan Geissler
IPC: B81C1/00 , H04R19/00 , H01L21/311 , H01L21/677 , H01L23/00
Abstract: A method for producing a thin-film layer includes providing a layer stack on a carrier substrate, wherein the layer stack includes a carrier layer and a sacrificial layer, and wherein the sacrificial layer includes areas in which the carrier layer is exposed. The method includes providing the thin-film layer on the layer stack, such that the thin-film layer bears on the sacrificial layer and, in the areas of the sacrificial layer in which the carrier layer is exposed, against the carrier layer. The method includes at least partly removing the sacrificial layer from the thin-film layer in order to eliminate a contact between the thin-film layer and the sacrificial layer in some areas. The method also includes detaching the thin-film layer from the carrier layer.
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公开(公告)号:US10889492B2
公开(公告)日:2021-01-12
申请号:US16269225
申请日:2019-02-06
Applicant: Infineon Technologies AG
Inventor: Alfred Sigl , Wolfgang Friza , Stefan Geissler
IPC: B81C1/00 , H04R19/00 , H01L21/311 , H01L21/677 , H01L23/00
Abstract: A method for producing a thin-film layer includes providing a layer stack on a carrier substrate, wherein the layer stack includes a carrier layer and a sacrificial layer, and wherein the sacrificial layer includes areas in which the carrier layer is exposed. The method includes providing the thin-film layer on the layer stack, such that the thin-film layer bears on the sacrificial layer and, in the areas of the sacrificial layer in which the carrier layer is exposed, against the carrier layer. The method includes at least partly removing the sacrificial layer from the thin-film layer in order to eliminate a contact between the thin-film layer and the sacrificial layer in some areas. The method also includes detaching the thin-film layer from the carrier layer.
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公开(公告)号:US20210391377A1
公开(公告)日:2021-12-16
申请号:US17345534
申请日:2021-06-11
Applicant: Infineon Technologies AG
Inventor: Alexander Frey , Bernhard Goller , Iris Moder , Ingo Muri , Alfred Sigl , Tobias Weindler
IPC: H01L27/146 , H01L23/544 , H01L21/304 , H01L29/78 , G01S17/894
Abstract: A method of manufacturing a semiconductor device is described. The method includes providing a semiconductor substrate. The semiconductor substrate includes a high-doped semiconductor substrate layer, a high-doped semiconductor device layer, and a low-doped semiconductor etch stop layer arranged between the high-doped semiconductor substrate layer and the high-doped semiconductor device layer. The high-doped semiconductor substrate layer is removed, wherein the removing includes dopant selective chemical etching stopping at the low-doped semiconductor etch stop layer. Further, the low-doped semiconductor etch stop layer is thinned to generate an exposed surface of the high-doped semiconductor device layer.
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公开(公告)号:US20190016588A1
公开(公告)日:2019-01-17
申请号:US16031722
申请日:2018-07-10
Applicant: Infineon Technologies AG
Inventor: Christian Bretthauer , Alfons Dehe , Alfred Sigl
Abstract: In accordance with an embodiment, a microelectromechanical transducer includes a displaceable membrane having an undulated section comprising at least one undulation trough and at least one undulation peak and a plurality of piezoelectric unit cells. At least one piezoelectric unit cell is provided in each case in at least one undulation trough and at least one undulation peak, where each piezoelectric unit cell has a piezoelectric layer and at least one electrode in electrical contact with the piezoelectric layer. The membrane may be formed as a planar component having a substantially larger extent in a first and a second spatial direction, which are orthogonal to one another, than in a third spatial direction, which is orthogonal to the first and the second spatial direction and defines an axial direction of the membrane.
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公开(公告)号:US09988262B2
公开(公告)日:2018-06-05
申请号:US15704537
申请日:2017-09-14
Applicant: Infineon Technologies AG
Inventor: Dominic Maier , Joachim Mahler , Daniel Porwol , Alfred Sigl
IPC: B81C1/00
CPC classification number: B81C1/00047 , B81C1/00666 , B81C2201/0125 , B81C2201/013 , B81C2203/0118 , B81C2203/0127
Abstract: A method for fabricating an electronic device is disclosed. In one example, the method comprises providing a semiconductor wafer, forming a plurality of cavities into the semiconductor wafer, filling a stabilization material into the cavities, fabricating a temporary panel by applying a cap sheet onto the semiconductor wafer, the cap sheet covering the cavities, singulating the temporary panel into a plurality of semiconductor devices, fabricating an embedded wafer by embedding the semiconductor devices in an encapsulant, removing the cap sheet of each one of the semiconductor devices, and singulating the embedded wafer into a plurality of electronic devices.
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公开(公告)号:US20240274573A1
公开(公告)日:2024-08-15
申请号:US18623163
申请日:2024-04-01
Applicant: Infineon Technologies AG
Inventor: Alfred Sigl , Alexander Frey
IPC: H01L23/00 , H01L21/18 , H01L25/065
CPC classification number: H01L24/94 , H01L21/187 , H01L25/0652
Abstract: A method of manufacturing a bonded substrate stack includes: providing a first substrate having a first hybrid interface layer, the first hybrid interface layer including a first insulator and a first metal; providing a second substrate having a second hybrid interface layer, the second hybrid interface layer including a second insulator and a second metal; surface-activating the first hybrid interface layer and the second hybrid interface layer by particle bombardment; and bringing the surface-activated first hybrid interface layer and the surface-activated second hybrid interface layer into contact, such that the first and second insulators bond together and the first and second metals bond together at the same time.
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公开(公告)号:US20200023630A1
公开(公告)日:2020-01-23
申请号:US16504811
申请日:2019-07-08
Applicant: Infineon Technologies AG
Inventor: Alfred Sigl , Dominic Maier , Daniel Porwol
Abstract: A device for debonding a structure from a main surface region of a carrier includes a tape for laminating to the structure, a first holder and a second holder for spanning the tape and to keep a tension of the tape. The second holder can be movable into a lifted position vertically offset to the main surface region of the carrier. The device can also include a deflecting-element for providing a deflection-line between the first holder and the second holder for deflecting the tape in response to moving the second holder into the lifted position. The deflecting-element can be moveable parallel to the carrier for moving the deflection-line parallel to the carrier and for debonding the structure, laminated to the tape, from the carrier.
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公开(公告)号:US20180086632A1
公开(公告)日:2018-03-29
申请号:US15704537
申请日:2017-09-14
Applicant: Infineon Technologies AG
Inventor: Dominic Maier , Joachim Mahler , Daniel Porwol , Alfred Sigl
IPC: B81C1/00
CPC classification number: B81C1/00047 , B81C1/00666 , B81C2201/0125 , B81C2201/013 , B81C2203/0118 , B81C2203/0127
Abstract: A method for fabricating an electronic device is disclosed. In one example, the method comprises providing a semiconductor wafer, forming a plurality of cavities into the semiconductor wafer, filling a stabilization material into the cavities, fabricating a temporary panel by applying a cap sheet onto the semiconductor wafer, the cap sheet covering the cavities, singulating the temporary panel into a plurality of semiconductor devices, fabricating an embedded wafer by embedding the semiconductor devices in an encapsulant, removing the cap sheet of each one of the semiconductor devices, and singulating the embedded wafer into a plurality of electronic devices.
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公开(公告)号:US11948912B2
公开(公告)日:2024-04-02
申请号:US18104456
申请日:2023-02-01
Applicant: Infineon Technologies AG
Inventor: Alfred Sigl , Alexander Frey
IPC: H01L23/00 , H01L21/18 , H01L25/065
CPC classification number: H01L24/94 , H01L21/187 , H01L25/0652
Abstract: A method of manufacturing a bonded substrate stack includes: providing a first substrate having a first hybrid interface layer, the first hybrid interface layer including a first insulator and a first metal; and providing a second substrate having a second hybrid interface layer, the second hybrid interface layer including a second insulator and a second metal. The hybrid interface layers are surface-activated to generate dangling bonds on the hybrid interface layers. The surface-activated hybrid interface layers are brought into contact, such that the dangling bonds of the first hybrid interface layer and the dangling bonds of the second hybrid interface layer bond together to form first insulator to second insulator bonds and first metal to second metal bonds.
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