公开(公告)号：US20230187298A1

公开(公告)日：2023-06-15

申请号：US18107800

申请日：2023-02-09

Applicant: Infineon Technologies AG

Inventor： Daniel Porwol ,  Thomas Fischer ,  Uwe Seidel ,  Anton Steltenpohl

IPC: H01L23/31

CPC classification number: H01L23/3164 ,  H01L23/3121 ,  H01L23/3135 ,  H01L23/3192 ,  H01L21/6836 ,  H01L2924/10335

Abstract: A package includes: an electronic component that includes a dielectric layer as a base and a semiconductor die attached on top of the dielectric layer, the semiconductor die having an active area with monolithically integrated circuit elements; and an encapsulant encapsulating the dielectric layer and the semiconductor die. The encapsulant is a mold compound having different material properties than the dielectric layer. A method of manufacturing package is also described.

公开(公告)号：US20210335687A1

公开(公告)日：2021-10-28

申请号：US17237143

申请日：2021-04-22

Applicant: Infineon Technologies AG

Inventor： Daniel Porwol ,  Thomas Fischer ,  Uwe Seidel ,  Anton Steltenpohl

IPC: H01L23/31

Abstract: An electronic component includes a mold layer and a semiconductor die including a low ohmic first portion and a high ohmic second portion. The low ohmic first portion has an active area. The high ohmic second portion is arranged on the mold layer.

公开(公告)号：US10694584B2

公开(公告)日：2020-06-23

申请号：US15818835

申请日：2017-11-21

Applicant: Infineon Technologies AG

Inventor： Stephan Pindl ,  Daniel Porwol ,  Johann Strasser

IPC: G01N21/17 ,  H05B3/00 ,  G02B5/20 ,  G02B5/26

Abstract: A method for producing an infrared emitter arrangement is provided. The method includes providing a carrier. The carrier includes at least one infrared emitter structure at a first side of the carrier and at least one cutout at a second side of the carrier, said second side being situated opposite the first side of the carrier, wherein the at least one cutout extends from the second side of the carrier in the direction of the at least one infrared emitter structure. The method further includes securing an infrared filter layer structure at the second side of the carrier in such a way that the at least one cutout separates the at least one infrared emitter structure from the infrared filter layer structure.

公开(公告)号：US09988262B2

公开(公告)日：2018-06-05

申请号：US15704537

申请日：2017-09-14

Applicant: Infineon Technologies AG

Inventor： Dominic Maier ,  Joachim Mahler ,  Daniel Porwol ,  Alfred Sigl

IPC: B81C1/00

CPC classification number: B81C1/00047 ,  B81C1/00666 ,  B81C2201/0125 ,  B81C2201/013 ,  B81C2203/0118 ,  B81C2203/0127

Abstract: A method for fabricating an electronic device is disclosed. In one example, the method comprises providing a semiconductor wafer, forming a plurality of cavities into the semiconductor wafer, filling a stabilization material into the cavities, fabricating a temporary panel by applying a cap sheet onto the semiconductor wafer, the cap sheet covering the cavities, singulating the temporary panel into a plurality of semiconductor devices, fabricating an embedded wafer by embedding the semiconductor devices in an encapsulant, removing the cap sheet of each one of the semiconductor devices, and singulating the embedded wafer into a plurality of electronic devices.

公开(公告)号：US20250029884A1

公开(公告)日：2025-01-23

申请号：US18904744

申请日：2024-10-02

Applicant: Infineon Technologies AG

Inventor： Daniel Porwol ,  Thomas Fischer ,  Uwe Seidel ,  Anton Steltenpohl

IPC: H01L23/31 ,  H01L21/683 ,  H01L23/00 ,  H01L23/29

Abstract: A method of manufacturing a package that includes providing an electronic component that includes a dielectric layer as a base and a semiconductor die attached on top of the dielectric layer. The semiconductor die having an active area with monolithically integrated circuit elements. Encapsulating the dielectric layer and the semiconductor die by an encapsulant. The encapsulant is a mold compound having different material properties than the dielectric layer, and the dielectric layer includes a polymer.

公开(公告)号：US12112992B2

公开(公告)日：2024-10-08

申请号：US18107800

申请日：2023-02-09

Applicant: Infineon Technologies AG

Inventor： Daniel Porwol ,  Thomas Fischer ,  Uwe Seidel ,  Anton Steltenpohl

IPC: H01L23/31 ,  H01L21/683 ,  H01L23/29 ,  H01L23/00

CPC classification number: H01L23/3164 ,  H01L23/3121 ,  H01L23/3135 ,  H01L23/3192 ,  H01L21/6836 ,  H01L23/295 ,  H01L24/02 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L2221/68327 ,  H01L2221/68368 ,  H01L2224/02377 ,  H01L2224/02381 ,  H01L2224/05569 ,  H01L2224/13024 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2924/10252 ,  H01L2924/10253 ,  H01L2924/10254 ,  H01L2924/10272 ,  H01L2924/10329 ,  H01L2924/1033 ,  H01L2924/10335

Abstract: A package includes: an electronic component that includes a dielectric layer as a base and a semiconductor die attached on top of the dielectric layer, the semiconductor die having an active area with monolithically integrated circuit elements; and an encapsulant encapsulating the dielectric layer and the semiconductor die. The encapsulant is a mold compound having different material properties than the dielectric layer. A method of manufacturing package is also described.

公开(公告)号：US11279120B2

公开(公告)日：2022-03-22

申请号：US16504811

申请日：2019-07-08

Applicant: Infineon Technologies AG

Inventor： Alfred Sigi ,  Dominic Maier ,  Daniel Porwol

IPC: B32B41/00 ,  B32B38/10 ,  B32B38/18

Abstract: A device for debonding a structure from a main surface region of a carrier includes a tape for laminating to the structure, a first holder and a second holder for spanning the tape and to keep a tension of the tape. The second holder can be movable into a lifted position vertically offset to the main surface region of the carrier. The device can also include a deflecting-element for providing a deflection-line between the first holder and the second holder for deflecting the tape in response to moving the second holder into the lifted position. The deflecting-element can be moveable parallel to the carrier for moving the deflection-line parallel to the carrier and for debonding the structure, laminated to the tape, from the carrier.

公开(公告)号：US09981843B2

公开(公告)日：2018-05-29

申请号：US15138313

申请日：2016-04-26

Applicant: Infineon Technologies AG

Inventor： Dominic Maier ,  Alfons Dehe ,  Thomas Kilger ,  Markus Menath ,  Franz Xaver Muehlbauer ,  Daniel Porwol ,  Juergen Wagner

IPC: H01L29/84 ,  B81C1/00

CPC classification number: B81C1/00896 ,  B81C1/00269 ,  B81C1/00801 ,  B81C2201/0194 ,  B81C2201/053

Abstract: A method of producing a chip package is described. A plurality of chips is provided on a first wafer. Each chip has a cavity which opens to a first main face of the chip. The cavities are filled or covered temporarily. The chips are then singulated. The singulated chips are embedded in an encapsulation material, and then the cavities are re-exposed.

公开(公告)号：US11605572B2

公开(公告)日：2023-03-14

申请号：US17237143

申请日：2021-04-22

Applicant: Infineon Technologies AG

Inventor： Daniel Porwol ,  Thomas Fischer ,  Uwe Seidel ,  Anton Steltenpohl

IPC: H01L23/31 ,  H01L21/683 ,  H01L23/29 ,  H01L23/00

Abstract: An electronic component includes a mold layer and a semiconductor die including a low ohmic first portion and a high ohmic second portion. The low ohmic first portion has an active area. The high ohmic second portion is arranged on the mold layer.

公开(公告)号：US10600690B2

公开(公告)日：2020-03-24

申请号：US16102174

申请日：2018-08-13

Applicant: Infineon Technologies AG

Inventor： Georg Meyer-Berg ,  Claus von Waechter ,  Michael Bauer ,  Holger Doepke ,  Dominic Maier ,  Daniel Porwol ,  Tobias Schmidt

IPC: B32B37/26 ,  B32B38/10 ,  H01L21/78 ,  H01L21/683 ,  H01L21/56 ,  H01L23/00 ,  B32B7/027 ,  H05K3/00 ,  B32B7/06

Abstract: A method for handling a product substrate includes bonding a carrier to the product substrate by: applying a layer of a temporary adhesive having a first coefficient of thermal expansion onto a surface of the carrier; and bonding the carrier to the product substrate using the applied temporary adhesive. A surface of the temporary adhesive is in direct contact to a surface of the product substrate. The temporary adhesive includes or is adjacent a filler material having a second coefficient of thermal expansion which is smaller than the first coefficient of thermal expansion, so that stress occurs inside the temporary adhesive layer or at an interface to the product substrate or the carrier during cooling down of the temporary adhesive layer.