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12 条记录 (耗时 0.017 秒)

    APPARATUSES, SYSTEMS, AND METHODS FOR HEATING A MEMORY DEVICE
    3.
    发明申请
    APPARATUSES, SYSTEMS, AND METHODS FOR HEATING A MEMORY DEVICE 有权

    公开(公告)号：US20210240388A1

    公开(公告)日：2021-08-05

    申请号：US16779472

    申请日：2020-01-31

    申请人： Intel Corporation

    发明人： Arash Hazeghi ,  Pranav Kalavade ,  Rohit Shenoy ,  Krishna Parat

    IPC分类号： G06F3/06 ,  G05B19/406

    摘要： An apparatus and/or system is described including a memory device or a controller for the memory device to perform heating of the memory device. In embodiments, a controller is to receive a temperature of the memory device and determine that the temperature is below a threshold temperature. In embodiments, the controller activates a heater for one or more memory die to assist the memory device in moving the temperature towards the threshold temperature, to assist the memory device when reading data. In embodiments, the heater comprises a plurality of conductive channels included in the one or more memory die or other on-board heater. Other embodiments are disclosed and claimed.

    Flash memory components and methods
    6.
    发明授权
    Flash memory components and methods 有权

    公开(公告)号：US11322508B2

    公开(公告)日：2022-05-03

    申请号：US15996116

    申请日：2018-06-01

    申请人： Intel Corporation

    发明人： Krishna Parat ,  Richard Fastow

    IPC分类号： H01L27/11556 ,  G11C16/04 ,  H01L21/764 ,  H01L27/11524 ,  H01L27/1157 ,  H01L27/11582

    摘要： Flash memory technology is disclosed. In one example, a flash memory component can include a plurality of conductive layers vertically spaced apart from one another and separated by voids, each of the plurality of conductive layers forming a word line. The memory component can also include a vertically oriented conductive channel extending through the plurality of conductive layers. In addition, the flash memory component can include a plurality of memory cells coupling the plurality of conductive layers to the conductive channel. Each word line can be associated with one of the plurality of memory cells. Associated devices, systems, and methods are also disclosed.

    Memory arrays with bonded and shared logic circuitry
    8.
    发明授权
    Memory arrays with bonded and shared logic circuitry 有权

    公开(公告)号：US10923450B2

    公开(公告)日：2021-02-16

    申请号：US16437445

    申请日：2019-06-11

    申请人： Intel Corporation

    发明人： Richard Fastow ,  Khaled Hasnat ,  Prashant Majhi ,  Owen W. Jungroth ,  Krishna Parat

    IPC分类号： H01L23/00 ,  H01L25/00 ,  H01L21/768 ,  H01L27/11582 ,  H01L27/11556 ,  H01L27/11526 ,  H01L27/11573 ,  H01L25/18

    摘要： An integrated circuit memory includes a logic circuitry bonded to a memory array. For example, the logic circuitry is formed separately from the memory array, and then the logic circuitry and the memory array are bonded. The logic circuitry facilitates operations of the memory array and includes complementary metal-oxide-semiconductor (CMOS) logic components, such as word line drivers, bit line drivers, sense amplifiers for the memory array. In an example, instead of being bonded to a single memory array, the logic circuitry is bonded to and shared by two memory arrays. For example, the logic circuitry is between two memory arrays. Due to the bonding process, a bonding interface layer is formed. Thus, in such an example, a first bonding interface layer is between the logic circuitry and a first memory array, and a second bonding interface layer is between the logic circuitry and a second memory array.

    Apparatuses, systems, and methods for heating a memory device
    10.
    发明授权
    Apparatuses, systems, and methods for heating a memory device 有权

    公开(公告)号：US11625191B2

    公开(公告)日：2023-04-11

    申请号：US16779472

    申请日：2020-01-31

    申请人： Intel Corporation

    发明人： Arash Hazeghi ,  Pranav Kalavade ,  Rohit Shenoy ,  Krishna Parat

    IPC分类号： G06F3/06 ,  G05B19/406

    摘要： An apparatus and/or system is described including a memory device or a controller for the memory device to perform heating of the memory device. In embodiments, a controller is to receive a temperature of the memory device and determine that the temperature is below a threshold temperature. In embodiments, the controller activates a heater for one or more memory die to assist the memory device in moving the temperature towards the threshold temperature, to assist the memory device when reading data. In embodiments, the heater comprises a plurality of conductive channels included in the one or more memory die or other on-board heater. Other embodiments are disclosed and claimed.