公开(公告)号：US20250046368A1

公开(公告)日：2025-02-06

申请号：US18920447

申请日：2024-10-18

Applicant: Kioxia Corporation

Inventor： Yasuhiko KUROSAWA

IPC: G11C11/56 ,  G11C16/10

Abstract: A memory device includes control circuitry that executes a first programming operation and executes a second programming operation after the first programming operation. The first programming operation includes setting a threshold voltage of each of a second set of memory cells in a second section corresponding to write data, and setting a threshold voltage of each of the third set of memory cells in a third section. The second programming operation includes setting the threshold voltage of each of the second set of memory cells in a fifth section corresponding to the write data, and setting the threshold voltage of each of the third set of memory cells in a sixth section or a seventh section among a plurality of fourth sections in accordance with temperature information. The sixth section includes the same voltage range as the third section. The seventh section is higher in voltage than the third section.

公开(公告)号：US20240061590A1

公开(公告)日：2024-02-22

申请号：US18500577

申请日：2023-11-02

Applicant: KIOXIA CORPORATION

Inventor： Tsuyoshi ATSUMI ,  Yasuhiko KUROSAWA

IPC: G06F3/06 ,  G06F7/58 ,  G11C7/10 ,  G11C19/00

CPC classification number: G06F3/0623 ,  G06F3/0619 ,  G06F7/584 ,  G06F3/0679 ,  G11C7/1006 ,  G11C7/1036 ,  G11C19/00

Abstract: A semiconductor device of an embodiment includes a seed generator circuit configured to generate a seed from inputted data by using first random number sequence data generated by an XorShift circuit; and a random number generator circuit configured to receive the seed as input to generate second random number sequence data by a second XorShift circuit.

公开(公告)号：US20240302994A1

公开(公告)日：2024-09-12

申请号：US18589277

申请日：2024-02-27

Applicant: Kioxia Corporation

Inventor： Kenji SAKAUE ,  Yasuhiko KUROSAWA

IPC: G06F3/06

CPC classification number: G06F3/0656 ,  G06F3/0611 ,  G06F3/0659 ,  G06F3/0679

Abstract: A memory system includes a nonvolatile memory, a memory controller, and a control circuit including a buffer and configured to store a first address transmitted by the memory controller in the buffer, generate a second address based on the first address stored in the buffer, and transmit the generated second address to the nonvolatile memory.

公开(公告)号：US20230038797A1

公开(公告)日：2023-02-09

申请号：US17972141

申请日：2022-10-24

Applicant: Kioxia Corporation

Inventor： Yasuhiko KUROSAWA ,  Naomi TAKEDA ,  Masanobu SHIRAKAWA ,  Yasuyuki USHIJIMA ,  Shinichi KANNO

IPC: G06F3/06 ,  G06F11/10 ,  G06F13/16 ,  G06F13/42 ,  G11C16/26 ,  G11C16/04

Abstract: According to one embodiment, a memory system includes a nonvolatile memory and a memory controller configured to execute a patrol process, in response to a first command set from a host device. In the patrol process, the memory controller is configured to read first data from the nonvolatile memory, and not to output the first data to the host device.

公开(公告)号：US20200265910A1

公开(公告)日：2020-08-20

申请号：US16866483

申请日：2020-05-04

Applicant: Kioxia Corporation

Inventor： Avi STEINER ,  Hanan WEINGARTEN ,  Yasuhiko KUROSAWA

IPC: G11C29/02 ,  G11C16/34

Abstract: The present embodiments relate to methods for maintaining steady and high performance programming of non-volatile memory devices such as NAND-type flash devices. According to certain aspects, embodiments provide adaptive control of programming parameters over the lifespan of a NAND flash device so as to maintain write performance and obtain high endurance.

公开(公告)号：US20230317152A1

公开(公告)日：2023-10-05

申请号：US17929439

申请日：2022-09-02

Applicant: Kioxia Corporation

Inventor： Yasuhiko KUROSAWA

IPC: G11C16/10 ,  G11C11/56

CPC classification number: G11C11/5628 ,  G11C11/5671 ,  G11C16/10

Abstract: A memory device includes control circuitry that executes a first programming operation and executes a second programming operation after the first programming operation. The first programming operation includes setting a threshold voltage of each of a second set of memory cells in a second section corresponding to write data, and setting a threshold voltage of each of the third set of memory cells in a third section. The second programming operation includes setting the threshold voltage of each of the second set of memory cells in a fifth section corresponding to the write data, and setting the threshold voltage of each of the third set of memory cells in a sixth section or a seventh section among a plurality of fourth sections in accordance with temperature information. The sixth section includes the same voltage range as the third section. The seventh section is higher in voltage than the third section.

公开(公告)号：US20230075286A1

公开(公告)日：2023-03-09

申请号：US17988081

申请日：2022-11-16

Applicant: Kioxia Corporation

Inventor： Tsuyoshi ATSUMI ,  Yasuhiko KUROSAWA

IPC: G06F3/06 ,  G06F7/58 ,  G11C7/10 ,  G11C19/00

Abstract: A semiconductor device of an embodiment includes a seed generator circuit configured to generate a seed from inputted data by using first random number sequence data generated by an XorShift circuit; and a random number generator circuit configured to receive the seed as input to generate second random number sequence data by a second XorShift circuit.

公开(公告)号：US20210373784A1

公开(公告)日：2021-12-02

申请号：US17200264

申请日：2021-03-12

Applicant: Kioxia Corporation

Inventor： Tsuyoshi ATSUMI ,  Yasuhiko KUROSAWA

IPC: G06F3/06 ,  G06F7/58

Abstract: A semiconductor device of an embodiment includes a seed generator circuit configured to generate a seed from inputted data by using first random number sequence data generated by an XorShift circuit; and a random number generator circuit configured to receive the seed as input to generate second random number sequence data by a second XorShift circuit.

公开(公告)号：US20250130724A1

公开(公告)日：2025-04-24

申请号：US19002373

申请日：2024-12-26

Applicant: KIOXIA CORPORATION

Inventor： Tsuyoshi ATSUMI ,  Yasuhiko KUROSAWA

IPC: G06F3/06 ,  G06F7/58 ,  G11C7/10 ,  G11C19/00

Abstract: A semiconductor device of an embodiment includes a seed generator circuit configured to generate a seed from inputted data by using first random number sequence data generated by an XorShift circuit; and a random number generator circuit configured to receive the seed as input to generate second random number sequence data by a second XorShift circuit.

公开(公告)号：US20220075562A1

公开(公告)日：2022-03-10

申请号：US17190496

申请日：2021-03-03

Applicant: Kioxia Corporation

Inventor： Yasuhiko KUROSAWA ,  Naomi TAKEDA ,  Masanobu SHIRAKAWA ,  Yasuyuki USHIJIMA ,  Shinichi KANNO

IPC: G06F3/06 ,  G06F11/10 ,  G06F13/16 ,  G06F13/42 ,  G11C16/04 ,  G11C16/26

Abstract: According to one embodiment, a memory system includes a nonvolatile memory and a memory controller configured to execute a patrol process, in response to a first command set from a host device. In the patrol process, the memory controller is configured to read first data from the nonvolatile memory, and not to output the first data to the host device.