Display Device Including Touch Sensors and Method of Manufacturing the Same

    公开(公告)号:US20190172882A1

    公开(公告)日:2019-06-06

    申请号:US16208892

    申请日:2018-12-04

    Abstract: A display device includes: thin film transistors (TFTs) on a substrate, pixel electrodes (PEs) respectively connected to the TFTs, common electrode blocks (CEBs) on the substrate, each CEB forming an electric field with a respective PE, touch sensing lines (TSLs) respectively connected to the CEBs, a lower planarization layer (PL) between the TFTs and the TSLs, an upper PL between the TSLs and one of: the PEs and the CEBs, an upper protective film between the PEs and the CEBs, and pixel contact holes extending through the lower PL and the upper PL to expose respective drain electrodes of the TFTs, wherein a side surface of each of the lower PL and the upper PL, exposed through the pixel contact holes, contacts one of: the upper protective film and the PEs.

    Display device including touch sensors and method of manufacturing the same

    公开(公告)号:US10672847B2

    公开(公告)日:2020-06-02

    申请号:US16208892

    申请日:2018-12-04

    Abstract: A display device includes: thin film transistors (TFTs) on a substrate, pixel electrodes (PEs) respectively connected to the TFTs, common electrode blocks (CEBs) on the substrate, each CEB forming an electric field with a respective PE, touch sensing lines (TSLs) respectively connected to the CEBs, a lower planarization layer (PL) between the TFTs and the TSLs, an upper PL between the TSLs and one of: the PEs and the CEBs, an upper protective film between the PEs and the CEBs, and pixel contact holes extending through the lower PL and the upper PL to expose respective drain electrodes of the TFTs, wherein a side surface of each of the lower PL and the upper PL, exposed through the pixel contact holes, contacts one of: the upper protective film and the PEs.

    Display device and method of manufacturing the same

    公开(公告)号:US10147776B2

    公开(公告)日:2018-12-04

    申请号:US15608452

    申请日:2017-05-30

    Abstract: Disclosed are a display device and a method of manufacturing the same. In the disclosed display device, a pad cover electrode disposed on a pad area comes into contact with an upper surface and a side surface of a pad electrode since a planarization layer is disposed on an active area excluding the pad area, which may prevent contact failure between the pad cover electrode and a conductive ball. In addition, in the display device, a first electrode, which is connected to a thin film transistor via a pixel connection electrode, is formed via the same mask process as the planarization layer so that it has a line width similar to that of the planarization layer and overlaps the planarization layer, which may simplify a structure and a manufacturing process.

    Thin film transistor substrate, method of fabricating the same and flat display having the same
    5.
    发明授权
    Thin film transistor substrate, method of fabricating the same and flat display having the same 有权
    薄膜晶体管基板,其制造方法和具有该薄膜晶体管基板的平面显示器

    公开(公告)号:US08796690B2

    公开(公告)日:2014-08-05

    申请号:US13804560

    申请日:2013-03-14

    Abstract: A thin film transistor substrate and a method for fabricating the same are disclosed. A thin film transistor substrate includes a substrate comprising a plurality of grooves having different depths, respectively, to have a multi-step structure; gate and data lines alternatively crossed in the grooves to form a plurality of pixel areas; thin film transistors formed in the grooves of the substrate to be formed in cross portion of the gate and data lines, wherein active layers of the thin transistors are formed along the gate lines and gate electrodes, the active layers separated from active layers of neighboring pixel areas with the data line located there between.

    Abstract translation: 公开了一种薄膜晶体管基板及其制造方法。 薄膜晶体管基板包括分别具有不同深度的多个凹槽的基板,以具有多步结构; 栅极和数据线在沟槽中交替交叉以形成多个像素区域; 形成在要形成在栅极和数据线的交叉部分中的衬底的凹槽中的薄膜晶体管,其中薄晶体管的有源层沿着栅极线和栅电极形成,有源层与相邻像素的有源层分离 数据线位于其间的区域。

    Thin Film Transistor Substrate, Method of Fabricating the Same and Flat Display Having the Same
    8.
    发明申请
    Thin Film Transistor Substrate, Method of Fabricating the Same and Flat Display Having the Same 有权
    薄膜晶体管基板,其制造方法和具有相同的平板显示器

    公开(公告)号:US20130292678A1

    公开(公告)日:2013-11-07

    申请号:US13804560

    申请日:2013-03-14

    Abstract: A thin film transistor substrate and a method for fabricating the same are disclosed. A thin film transistor substrate includes a substrate comprising a plurality of grooves having different depths, respectively, to have a multi-step structure; gate and data lines alternatively crossed in the grooves to form a plurality of pixel areas; thin film transistors formed in the grooves of the substrate to be formed in cross portion of the gate and data lines, wherein active layers of the thin transistors are formed along the gate lines and gate electrodes, the active layers separated from active layers of neighboring pixel areas with the data line located there between.

    Abstract translation: 公开了一种薄膜晶体管基板及其制造方法。 薄膜晶体管基板包括分别具有不同深度的多个凹槽的基板,以具有多步结构; 栅极和数据线在沟槽中交替交叉以形成多个像素区域; 形成在要形成在栅极和数据线的交叉部分中的衬底的凹槽中的薄膜晶体管,其中薄晶体管的有源层沿着栅极线和栅电极形成,有源层与相邻像素的有源层分离 数据线位于其间的区域。

    Display device having touch sensors and method of manufacturing the same

    公开(公告)号:US10775912B2

    公开(公告)日:2020-09-15

    申请号:US16217809

    申请日:2018-12-12

    Abstract: Disclosed is a display device having touch sensors which may reduce parasitic capacitance and a method of manufacturing the same. The display device includes a plurality of touch sensing lines respectively arranged so as to traverse a plurality of common electrode blocks forming an electric field with pixel electrodes, a lower planarization layer having openings in regions overlapping drain electrodes of thin film transistors, an upper planarization layer arranged between one of the pixel electrodes and the common electrode blocks, and the touch sensing lines so as to cover a side surface of the lower planarization layer, and an upper protective film arranged between the pixel electrodes and the common electrode blocks, and, thus, parasitic capacitance generated between the touch sensing lines and the common electrode blocks may be reduced without reduction in liquid crystal capacitance and storage capacitance.

Patent Agency Ranking