公开(公告)号：US20180082936A1

公开(公告)日：2018-03-22

申请号：US15700220

申请日：2017-09-11

Applicant: MEDIATEK INC.

Inventor： Shih-Yi SYU ,  Chia-Yu JIN ,  Che-Ya CHOU ,  Wen-Sung HSU ,  Nan-Cheng CHEN

IPC: H01L23/498 ,  H01L23/42 ,  H01L23/64 ,  H01L23/31 ,  H01L21/48

CPC classification number: H01L23/49833 ,  H01L21/4857 ,  H01L21/563 ,  H01L23/3107 ,  H01L23/3135 ,  H01L23/3675 ,  H01L23/42 ,  H01L23/4334 ,  H01L23/49816 ,  H01L23/642 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L25/0657 ,  H01L2224/1308 ,  H01L2224/131 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/81815 ,  H01L2224/83191 ,  H01L2224/92125 ,  H01L2224/92225 ,  H01L2924/1431 ,  H01L2924/1432 ,  H01L2924/15311 ,  H01L2924/16251 ,  H01L2924/164 ,  H01L2924/18161 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/19106 ,  H01L2924/014 ,  H01L2924/00014

Abstract: A semiconductor package structure is provided. The semiconductor package structure includes a first carrier substrate having a first surface and an opposing second surface. A second carrier substrate is stacked on the first carrier substrate and has a first surface and an opposing second surface that faces the first surface of the first carrier substrate. A semiconductor die is mounted on the first surface of the second carrier substrate. A heat spreader is disposed on the first surface of the first carrier substrate to cover and surround the second carrier substrate and the semiconductor die. A method for forming the semiconductor package structure is also provided.

公开(公告)号：US20240312893A1

公开(公告)日：2024-09-19

申请号：US18594446

申请日：2024-03-04

Applicant: MEDIATEK INC.

Inventor： Hui-Chi TANG ,  Shih-Yi SYU ,  Hao-Ju WANG ,  Pei-San CHEN ,  Duen-Yi HO

IPC: H01L23/498 ,  H01L23/00

CPC classification number: H01L23/49838 ,  H01L24/16 ,  H01L2224/16227 ,  H01L2924/14361

Abstract: An electronic device is provided. The electronic device includes a base and a semiconductor device. The base has a top surface and a bottom surface. The semiconductor device is disposed on the top surface of the base. The semiconductor device has a device edge located within the base in a top view. The base has a unit pad array which is covered by the semiconductor device and electrically connected to the semiconductor device. The unit pad array includes a first pad region composed of a first row and a second row of the unit pad array. The first pad region includes first pads for transmitting commands and addresses to and from the semiconductor device. The first row of the unit pad array is arranged so that it is closer to the device edge than the second row of the unit pad array.

公开(公告)号：US20230253389A1

公开(公告)日：2023-08-10

申请号：US18145211

申请日：2022-12-22

Applicant: MEDIATEK INC.

Inventor： Shih-Yi SYU ,  Wen-Chou WU

IPC: H01L25/18 ,  H01L23/498 ,  H01L23/538 ,  H01L25/065 ,  H01L23/31

CPC classification number: H01L25/18 ,  H01L23/49811 ,  H01L23/5383 ,  H01L23/5385 ,  H01L23/5386 ,  H01L25/0657 ,  H01L23/3121 ,  H01L2225/06562 ,  H01L2225/0651 ,  H01L2225/1058

Abstract: A semiconductor package assembly is provided. The semiconductor package assembly includes a fan-out package and a memory package stacked on the fan-out package. The fan-out package includes a first redistribution layer (RDL) structure, a first logic die, through via (TV) interconnects, and first conductive structures. The first logic die and the first conductive structures are in contact with the first RDL structure. The TV interconnects are electrically connected to the first RDL structure. The memory package includes a first substrate, a memory die, and second conductive structures. The memory die and the second conductive structures are disposed on the first substrate. The memory die is electrically connected to the first logic die using the TV interconnects and the first RDL structure. The semiconductor package assembly further includes a second substrate electrically connected to the first logic die using the first conductive structures.