中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

28 records (took 0.018 seconds)

    LOW CAPACITANCE INTERCONNECT STRUCTURES AND ASSOCIATED SYSTEMS AND METHODS
    6.
    发明申请
    LOW CAPACITANCE INTERCONNECT STRUCTURES AND ASSOCIATED SYSTEMS AND METHODS 有权
    低电容互连结构及相关系统及方法

    公开(公告)号：US20160111372A1

    公开(公告)日：2016-04-21

    申请号：US14514936

    申请日：2014-10-15

    Applicant: Micron Technology, Inc.

    Inventor： Jin Lu ,  Hongqi Li ,  Kevin Torek ,  Thy Tran ,  Alex Schrinsky

    IPC: H01L23/532 ,  H01L23/48 ,  H01L23/528 ,  H01L21/311 ,  H01L21/768 ,  H01L21/02

    CPC classification number: H01L21/76898 ,  H01L21/3081 ,  H01L21/31111 ,  H01L21/31116 ,  H01L21/3212 ,  H01L21/76831 ,  H01L23/481 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: Semiconductor device interconnect structures having low capacitance and associated systems and methods are disclosed herein. In one embodiment, a method of manufacturing an interconnect structure includes forming an opening in a surface of a semiconductor device and forming an interconnect structure at least within the opening. Forming the interconnect structure includes depositing a first insulator material on both the surface and a sidewall of the opening, selectively removing a first portion of the first insulator material on the surface over a second portion of the first insulator material on the sidewall, depositing a second insulator material on the second portion, and depositing a conductive material on the second insulator material. The method further includes selecting the thickness of the first and second insulators materials based on a threshold level of capacitance between the sidewall and the conductive material.

    Abstract translation: 本文公开了具有低电容和相关系统和方法的半导体器件互连结构。 在一个实施例中，制造互连结构的方法包括在半导体器件的表面中形成开口并且至少在开口内形成互连结构。 形成互连结构包括在开口的表面和侧壁上沉积第一绝缘体材料，在侧壁上的第一绝缘体材料的第二部分上选择性地去除表面上的第一绝缘体材料的第一部分， 绝缘体材料，并且在第二绝缘体材料上沉积导电材料。 该方法还包括基于侧壁和导电材料之间的电容的阈值水平来选择第一和第二绝缘体材料的厚度。

    Semiconductor Constructions
    7.
    发明申请
    Semiconductor Constructions 有权
    半导体建筑

    公开(公告)号：US20150054164A1

    公开(公告)日：2015-02-26

    申请号：US13975722

    申请日：2013-08-26

    Applicant: Micron Technology, Inc.

    Inventor： Hongqi Li ,  Gowrisankar Damarla ,  Robert J. Hanson ,  Jin Lu ,  Shyam Ramalingam

    IPC: H01L23/48 ,  H01L21/768

    CPC classification number: H01L21/76816 ,  H01L21/76877 ,  H01L23/481 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/5283 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: Some embodiments include semiconductor constructions having first and second electrically conductive lines that intersect with one another at an intersection. The first line has primarily a first width, and has narrowed regions directly against the second line and on opposing sides of the second line from one another. Electrically conductive contacts are along the first line and directly electrically coupled to the first line, and one of the electrically conductive contacts is directly against the intersection. Some embodiments include methods of forming intersecting lines of material. First and second trenches are formed, and intersect with one another at an intersection. The first trench has primarily a first width, and has narrowed regions directly against the second trench and on opposing sides of the second trench from one another. Material is deposited within the first and second trenches to substantially entirely fill the first and second trenches.

    Abstract translation: 一些实施例包括具有在交叉点处彼此相交的第一和第二导电线的半导体结构。 第一线主要具有第一宽度，并且具有直接相对于第二线并且在第二线的相对侧彼此变窄的区域。 导电触头沿着第一线并且直接电耦合到第一线，并且一个导电触头直接抵靠该交叉。 一些实施例包括形成相交线材料的方法。 形成第一和第二沟槽，并在相交处相互交叉。 第一沟槽主要具有第一宽度，并且将区域直接靠在第二沟槽和第二沟槽的相对侧上彼此变窄。 材料沉积在第一和第二沟槽内，以基本上完​​全填充第一和第二沟槽。

Patent Agency Ranking