摘要:
A Hall-effect element includes an isolating layer and an active layer of a first electrical conductivity type disposed on the isolating layer, the active layer having a surface. A first set of contacts is disposed in contact with the surface along a first axis, and a second set of contacts is disposed in contact with the surface along a second axis transverse to the first axis. An insulating layer is disposed on the surface. A metal control field plate is disposed on the insulating layer and is coupleable to a voltage source to control the accumulation of charge carriers at the surface of the active layer to vary the resistance of the active layer. Also, a method is provided for reducing null offset in a Hall-effect element. The method includes the steps of providing an isolating layer, disposing an active layer of a first electrical conductivity type on the isolating layer, the active layer having a surface, disposing a first set of contacts on the surface along a first axis, disposing a second set of contacts on the surface along a second axis transverse to the first axis; and disposing an insulating layer on the surface. A voltage is applied across the insulating layer to control the accumulation of charge carriers at the surface to vary the resistance of the active layer.
摘要:
Disclosed are methods for providing wafer photonic flow control to a semiconductor wafer (1700) having a substrate (1720), at least one active layer (1765) and at least one surface layer (1710). Photonic flow control can be achieved through the formation of trenches (1725) and/or insulating implants (1730) formed in said wafer (1700), whereby active regions (1760) are defined by trenches (1725) that operate as nonconductive areas (1750). Methods of and systems for wafer level burn-in (WLBI) of semiconductor devices are also disclosed. Photonic flow control at the wafer level is important when using WLBI methods and systems.
摘要:
Disclosed are methods for providing wafer parasitic current control to a semiconductor wafer (1500) having a substrate (1520), at least one active layer (1565) and a surface layer (1510), and electrical contacts (1515) formed on said surface layer (1510). Current control can be achieved with the formation of trenches (1525) around electrical contacts, where electrical contacts and associated layers define an electronic device. Insulating implants (1530) can be placed into trenches (1525) and/or sacrificial layers (1540) can be formed between electronic contacts (1515). Trenches control current by promoting current flow within active (e.g., conductive) regions (1560) and impeding current flow through inactive (e.g., nonconductive) regions (1550). Methods of and systems for wafer level burn-in (WLBI) of semiconductor devices are also disclosed. Current control at the wafer level is important when using WLBI methods and systems.
摘要:
Disclosed are methods for providing wafer parasitic current control to a semiconductor wafer (1240) having a substrate (1240), at least one active layer (1240) and at least one surface layer (1240), Current control can be achieved through the formation of patterns (1240) surrounding contacts (1215), said patterns (1240) including insulating implants and/or sacrificial layers formed between active devices represented by said contacts (1215). Current flows through active regions (1260) associated with said contacts (1215) and active devices. Methods of and systems for wafer level burn-in (WLBI) of semiconductor devices are also disclosed. Current control at the wafer level is important when using WLBI methods and systems.
摘要:
A method and system for detecting a magnetic field utilizing a magnetoresistor of a magnetic sensor is disclosed. A normalized magnetoresistance associated with the magnetoresistor can be calculated such that the magnetoresistor comprises an initial magnetization direction thereof. The magnetic field is generally permitted to exceed an ability of the magnetoresistor to remain pointed in the initial magnetization direction, thereby enabling the magnetoresistor to experience a magnetization reversal thereof. The normalized resistance can be placed into a new state in response to the magnetization reversal thereof, thereby permitting the normalized resistance to be utilized as a switch thereof and allowing the magnetic sensor to detect changes in the magnetic field associated with the magnetoresistor.
摘要:
A microsensor housing having a structure with at least one inlet at one end and a thermal property sensor at the other end. Situated between the inlet and the sensor is a convection shield. Sampled fluid is taken in the inlet from a channel carrying the fluid to be sampled. The convection flow lines of the fluid are barred by the convection shield. The fluid is diffused into a cavity between the shield and sensor. The sensor detects a thermal property of the diffused fluid. One preferred shield has holes about its perimeter with a solid center part of the shield covering at a distance the sensor. The channel carrying the fluid may have screens to reduce turbulence noise and to aid in fluid transport to and from the sensor housing.
摘要:
The ring magnet speed and direction sensing scheme according to the present invention addresses many of the shortcomings of the prior art. In accordance with various aspects of the present invention, a pair of bridges placed on the same semiconductor chip are provided for sensing the passing of north/south transition points on a ring magnet. In accordance with an exemplary embodiment, the bridge contains a first group of runners that are perpendicular to a second group of runners. The bridges are placed to cause the signal from one bridge to slightly follow the signal from the other bridge. Placement of the bridges on the same chip enables highly accurate readings.
摘要:
A method of forming a composite diaphragm for a pressure transducer is disclosed. The method comprises providing a substrate layer having a first conductivity type and a first surface. Positive implants are deposited in the first surface of the substrate layer, and an epitaxial layer is grown on the first surface of the substrate layer so that the positive implants form positive diffusions in the epitaxial layer. An oxide pattern is formed on the epitaxial layer, and a top layer is deposited over the epitaxial layer and oxide pattern. The substrate layer and positive diffusions of the epitaxial layer are then etched to form the composite diaphragm. The positive diffusions can be patterned so that the resulting etched structure has improved diaphragm performance characteristics. For example, the remaining pattern can include a plurality of bosses and interconnecting battens so that the diaphragm has a relatively high burst pressure and a high output signal with improved linearity at low pressures.
摘要:
A stack of two refractory nitride layers and a magnetoresistive layer are used to facilitate electrical connection between components of a sensor. The stack of tantalum nitride and nickel iron layers are disposed over a silicide layer that is, in turn, disposed on a diffusion of conductive material within the body of a silicon layer. A titanium tungsten layer is disposed on the stack and below a subsequent layer of a conductive metal such as aluminum. A silicon nitride passivation layer is disposed over all of the other layers.
摘要:
Methods of conducting wafer level burn-in (WLBI) of semiconductor devices are presented wherein systems are provided having at least two electrodes (210, 215). Electrical bias (920) and/or thermal power (925) is applied on each side of a wafer (100) having back and front electrical contacts for semiconductor devices borne by the wafer. A pliable conductive layer (910) is described for supplying pins on the device side of a wafer with electrical contact and/or also for providing protection to the wafer from mechanical pressure being applied to its surfaces. Use of a cooling system (950) is also described for enabling the application of a uniform temperature to a wafer undergoing burn-in. Wafer level burn-in is performed by applying electrical and physical contact (915) using an upper contact plate to individual contacts for the semiconductor devices; applying electrical and physical contact using a lower contact plate (910) to a substrate surface of said semiconductor wafer; providing electrical power (920) to said semiconductor devices through said upper and lower second contact plates from a power source coupled to said upper and lower contacts plates; monitoring and controlling electrical power (935) to said semiconductor devices for a period in accordance with a specified burn-in criteria; removing electrical power at completion of said period (955); and removing electrical and physical contact to said semiconductor wafer (965).