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公开(公告)号：US11632098B2
公开(公告)日：2023-04-18
申请号：US17211716
申请日：2021-03-24
Applicant: Qualcomm Incorporated
Inventor： Timothy Donald Gathman , Lai Kan Leung , Chirag Dipak Patel , Xinmin Yu , Rajagopalan Rangarajan
Abstract: An example apparatus includes a polyphase transconductance-capacitor filter. The polyphase filter includes a DC bias voltage node, a plus in-phase filter unit, a minus in-phase filter unit, a plus quadrature-phase filter unit, and a minus quadrature-phase filter unit. Each filter unit respectively includes an input node, an output node, and a control node. The polyphase filter also includes a plus in-phase switch and a minus in-phase switch. The plus in-phase switch is coupled to the control node of the plus in-phase filter unit, the DC bias voltage node, and the input node of one or both of the plus quadrature-phase filter unit and the minus quadrature-phase filter unit. The minus in-phase switch is coupled to the control node of the minus in-phase filter unit, the DC bias voltage node, and the input node of one or both of the plus quadrature-phase filter unit and the minus quadrature-phase filter unit.
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公开(公告)号：US10193580B2
公开(公告)日：2019-01-29
申请号：US15927022
申请日：2018-03-20
Applicant: QUALCOMM Incorporated
Inventor： Chirag Dipak Patel , Lai Kan Leung , Xinmin Yu , Timothy Donald Gathman , Ravi Sridhara
Abstract: Devices and techniques are described to extract specific frequency band signals from a wide-band radio-frequency signal. A network entity may include an antenna for receiving the wide-band radio-frequency signal and may include a receiver circuit for processing the wide-band radio-frequency signal. The receiver circuit may include a transconductance amplifier and a plurality of single-band circuits. The transconductance amplifier may be configured to generate an amplified wide-band radio-frequency signal and send it to one or more of the single-band circuits. Each single-band circuit may be configured to extract a different frequency band signal from the amplified wide-band radio-frequency signal.
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公开(公告)号：US09948239B2
公开(公告)日：2018-04-17
申请号：US15272124
申请日：2016-09-21
Applicant: QUALCOMM Incorporated
Inventor： Kiyong Choi , Yi Zeng , Hong Sun Kim , Sasha Vujcic , Chirag Dipak Patel , Aleksandar Miodrag Tasic , Timothy Donald Gathman , Wu-Hsin Chen , Klaas van Zalinge
CPC classification number: H03D7/1458 , H03D7/1441 , H03D7/1466 , H03F3/193 , H03F3/21 , H03F3/265 , H03F3/72 , H03F2200/09 , H03F2200/294 , H03F2200/451 , H03F2200/537 , H03F2200/541 , H03G3/3052 , H04B1/109 , H04W52/0209
Abstract: A method and apparatus are disclosed for a configurable mixer capable of operating in a linear, a legacy, and a low-power mode. In the linear mode, the configurable mixer is configured to operate as a double-balanced mixer to multiply a first differential signal by a second differential signal. In the legacy mode, the configurable mixer is configured to as a double-balanced mixer to multiply a differential signal by a single-ended signal. In the low-power mode, the configurable mixer is configured to operate as a single-balanced mixer to multiply a differential signal by a single-ended signal. The operating mode of the configurable mixer may be based, at least in part, on a mode control signal. In some embodiments, the configurable mixer may be included in an analog front end of a wireless communication device.
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公开(公告)号：US10756772B1
公开(公告)日：2020-08-25
申请号：US16418734
申请日：2019-05-21
Applicant: Qualcomm Incorporated
Inventor： Chirag Dipak Patel , Jeremy Goldblatt , Yunfei Feng , Li Liu , Xinmin Yu , Aliakbar Homayoun
Abstract: An apparatus is disclosed for mixing signals with a multi-mode mixer for frequency translation. In example implementations, a multi-mode mixer includes a supply voltage node, a ground node, a first data signal coupler, and a second data signal coupler. The multi-mode mixer also includes a mixer core and a current control switch. The mixer core is coupled between the first data signal coupler and the second data signal coupler. The current control switch is configured to selectively enable or disable flow of a current through the mixer core. The first data signal coupler, the second data signal coupler, the mixer core, and the current control switch are coupled together in series between the supply voltage node and the ground node.
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公开(公告)号：US10659010B1
公开(公告)日：2020-05-19
申请号：US16254877
申请日：2019-01-23
Applicant: QUALCOMM INCORPORATED
Inventor： Chirag Dipak Patel , Lai Kan Leung , Ravi Sridhara
Abstract: An RF driver circuit may include a wideband output impedance matching and gain circuit, a wideband input impedance matching and gain circuit, and a summer configured to sum the outputs of the wideband output impedance matching and gain circuit and wideband input impedance matching and gain circuit. The wideband output impedance matching and gain circuit and wideband input impedance matching and gain circuit may collectively provide the gain of the RF driver circuit. The wideband output impedance matching circuit may have a source follower configuration. The wideband input impedance matching circuit may have a common gate configuration. Controllable bias voltages may be used to maintain a constant gain and interface impedances in multiple modes of operation.
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Patent Agency Ranking
公开(公告)号：US20180083574A1
公开(公告)日：2018-03-22
申请号：US15272124
申请日：2016-09-21
Applicant: QUALCOMM Incorporated
Inventor： Kiyong Choi , Yi Zeng , Hong Sun Kim , Sasha Vujcic , Chirag Dipak Patel , Aleksandar Miodrag Tasic , Timothy Donald Gathman , Wu-Hsin Chen , Klaas van Zalinge
CPC classification number: H03D7/1458 , H03D7/1441 , H03D7/1466 , H03F3/193 , H03F3/21 , H03F3/265 , H03F3/72 , H03F2200/09 , H03F2200/294 , H03F2200/451 , H03F2200/537 , H03F2200/541 , H03G3/3052 , H04B1/109 , H04W52/0209
Abstract: A method and apparatus are disclosed for a configurable mixer capable of operating in a linear, a legacy, and a low-power mode. In the linear mode, the configurable mixer is configured to operate as a double-balanced mixer to multiply a first differential signal by a second differential signal. In the legacy mode, the configurable mixer is configured to as a double-balanced mixer to multiply a differential signal by a single-ended signal. In the low-power mode, the configurable mixer is configured to operate as a single-balanced mixer to multiply a differential signal by a single-ended signal. The operating mode of the configurable mixer may be based, at least in part, on a mode control signal. In some embodiments, the configurable mixer may be included in an analog front end of a wireless communication device.
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公开(公告)号：US11283409B2
公开(公告)日：2022-03-22
申请号：US16557961
申请日：2019-08-30
Applicant: QUALCOMM Incorporated
Inventor： Lai Kan Leung , Xinmin Yu , Chirag Dipak Patel , Rajagopalan Rangarajan
Abstract: In certain aspects, a receiver includes first amplifiers, wherein each one of the first amplifiers comprises an input and an output. The receiver also includes second amplifiers, wherein each one of the second amplifiers comprises an input and an output, and the outputs of the second amplifiers are coupled to a combining node. The receiver also includes transmission lines, wherein each one of the transmission lines is coupled between the output of a respective one of the first amplifiers and the input of a respective one of the second amplifiers. The receiver further includes a load coupled to the combining node, and receiver elements, wherein each one of the receiver elements comprises an input and an output, and the output of each one of the receiver elements is coupled to the input of a respective one of the first amplifiers.
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公开(公告)号：US20200076387A1
公开(公告)日：2020-03-05
申请号：US16115475
申请日：2018-08-28
Applicant: Qualcomm Incorporated
Inventor： Timothy Donald Gathman , Chirag Dipak Patel , Lai Kan Leung , Xinmin Yu
Abstract: An apparatus is disclosed for complementary variable gain amplification. In an example aspect, the apparatus includes a variable gain amplifier that includes multiple amplifiers. The multiple amplifiers include at least one first amplifier and at least one second amplifier cascaded together in series. The first amplifier includes a first set of transistors having a first doping type. At least a portion of the first set of transistors is configured to implement a first current mirror. The second amplifier includes a second set of transistors having a second doping type. At least a portion of the second set of transistors is configured to implement a second current mirror. The second current mirror is coupled to the first current mirror.
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公开(公告)号：US10469122B2
公开(公告)日：2019-11-05
申请号：US15872695
申请日：2018-01-16
Applicant: QUALCOMM Incorporated
Inventor： Chirag Dipak Patel , Lai Kan Leung , Zhang Jin , Chinmaya Mishra , Ravi Sridhara , Youngchang Yoon
IPC: H04B1/44 , H04W72/04 , H04L5/14 , H03F1/48 , H03F3/19 , H03F1/56 , H03F3/24 , H03H7/46 , H04B1/00 , H04B1/04 , H04B1/18 , H04B1/48 , H03F3/195
Abstract: Various aspects described herein relate to low-loss multi-band multiplexing schemes for a wireless communications system, for example, a 5th Generation (5G) New Radio (NR) system. In an aspect, a multiplexer for multi-band wireless communications comprises at least one tuning component configured to transmit or receive at least one signal within a frequency band that is selected from a plurality of frequency bands. The multiplexer further comprises at least one combining component, communicatively coupled with the at least one tuning component, configured to transmit or receive the at least one signal within the selected frequency band. In an aspect, the at least one tuning component is integrated on a chip and the at least one combining component is not integrated on the chip.
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公开(公告)号：US10439593B2
公开(公告)日：2019-10-08
申请号：US15712406
申请日：2017-09-22
Applicant: QUALCOMM Incorporated
Inventor： Timothy Donald Gathman , Lai Kan Leung , Chirag Dipak Patel , Rajagopalan Rangarajan
Abstract: Certain aspects of the present disclosure relate to multi-band filter architectures and methods for filtering signals using the multi-band filter architectures. One example multi-band filter generally includes a transconductance-capacitance (gm-C) filter and a reconfigurable load impedance coupled to an output of the gm-C filter, the reconfigurable load impedance comprising a first gyrator circuit coupled to a second gyrator circuit.
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