公开(公告)号：US20140181542A1

公开(公告)日：2014-06-26

申请号：US14174012

申请日：2014-02-06

Applicant: QUALCOMM Incorporated

Inventor： Sumit Sur ,  Bohuslav Rychlik ,  Steven S. Thomson ,  Ali Iranli ,  Brian J. Salsbery

IPC: G06F1/26

CPC classification number: G06F1/26 ,  G06F1/206 ,  G06F1/3203 ,  G06F1/324 ,  G06F1/3287 ,  G06F1/329 ,  Y02D10/126 ,  Y02D10/16 ,  Y02D10/171 ,  Y02D10/24

Abstract: A method of controlling power within a multicore central processing unit (CPU) is disclosed. The method may include monitoring a die temperature, determining a degree of parallelism within a workload of the CPU, and powering one or more cores of the CPU up or down based on the degree of parallelism, the die temperature, or a combination thereof.

Abstract translation: 公开了一种在多核中央处理单元（CPU）内控制功率的方法。 该方法可以包括监视模具温度，确定CPU的工作负载内的并行程度，以及基于平行度，模具温度或其组合来向上或向下驱动CPU的一个或多个核心。

公开(公告)号：US20130151879A1

公开(公告)日：2013-06-13

申请号：US13759709

申请日：2013-02-05

Applicant: QUALCOMM Incorporated

Inventor： Steven S. Thomson ,  Bohuslav Rychlik ,  Ali Iranli ,  Sumit Sur ,  Norman S. Gargash

IPC: G06F1/32

CPC classification number: G06F1/329 ,  G06F1/3203 ,  G06F1/3228 ,  G06F1/324 ,  G06F1/3296 ,  Y02D10/126 ,  Y02D10/172

Abstract: Methods, systems and devices that include a dynamic clock and voltage scaling (DCVS) solution configured to compute and enforce performance guarantees for a group of processors to ensure that the processors does not remain in a busy state (e.g., due to transient workloads) for a combined period that is more than a predetermined amount of time above that which is required for one of the processors to complete its pre-computed steady state workload. The DCVS may adjust the frequency and/or voltage of one or more of the processors based on a variable delay to ensure that the multiprocessor system only falls behind its steady state workload by, at most, a predefined maximum amount of work, irrespective of the operating frequency or voltage of the processors.

Abstract translation: 包括动态时钟和电压缩放（DCVS）解决方案的方法，系统和设备，用于为一组处理器计算和实施性能保证，以确保处理器不处于忙状态（例如，由于临时工作负载） 该组合时段大于超过一个处理器完成其预先计算的稳态工作量所需的预定时间量。 DCVS可以基于可变延迟来调整一个或多个处理器的频率和/或电压，以确保多处理器系统仅落后于其稳态工作负载，最多只能达到预定的最大工作量，而不管 处理器的工作频率或电压。

公开(公告)号：US09176572B2

公开(公告)日：2015-11-03

申请号：US13759709

申请日：2013-02-05

Applicant: QUALCOMM Incorporated

Inventor： Steven S. Thomson ,  Bohuslav Rychlik ,  Ali Iranli ,  Sumit Sur ,  Norman S. Gargash

IPC: G06F1/32

CPC classification number: G06F1/329 ,  G06F1/3203 ,  G06F1/3228 ,  G06F1/324 ,  G06F1/3296 ,  Y02D10/126 ,  Y02D10/172

Abstract: Methods, systems and devices that include a dynamic clock and voltage scaling (DCVS) solution configured to compute and enforce performance guarantees for a group of processors to ensure that the processors does not remain in a busy state (e.g., due to transient workloads) for a combined period that is more than a predetermined amount of time above that which is required for one of the processors to complete its pre-computed steady state workload. The DCVS may adjust the frequency and/or voltage of one or more of the processors based on a variable delay to ensure that the multiprocessor system only falls behind its steady state workload by, at most, a predefined maximum amount of work, irrespective of the operating frequency or voltage of the processors.

Abstract translation: 包括动态时钟和电压缩放（DCVS）解决方案的方法，系统和设备，用于为一组处理器计算和实施性能保证，以确保处理器不处于忙状态（例如，由于临时工作负载） 该组合时段大于超过一个处理器完成其预先计算的稳态工作量所需的预定时间量。 DCVS可以基于可变延迟来调整一个或多个处理器的频率和/或电压，以确保多处理器系统仅落后于其稳态工作负载，最多只能达到预定的最大工作量，而不管 处理器的工作频率或电压。

公开(公告)号：US09507641B1

公开(公告)日：2016-11-29

申请号：US14709385

申请日：2015-05-11

Applicant: QUALCOMM INCORPORATED

Inventor： James Michael Artmeier ,  Sumit Sur ,  Robert Scott Dreyer ,  Michael Douglas Sharp ,  James Lyall Esliger

IPC: G06F9/46 ,  G06F9/50

CPC classification number: G06F9/5044 ,  G06F9/505 ,  G06F9/5066 ,  G06F9/5083 ,  Y02D10/22 ,  Y02D10/36

Abstract: Systems and methods for dynamic granularity control of parallelized work in a heterogeneous multi-processor portable computing device (PCD) are provided. During operation a first parallelized portion of an application executing on the PCD is identified. The first parallelized portion comprising a plurality of threads for parallel execution on the PCD. Performance information is obtained about a plurality of processors of the PCD, each of the plurality of processors corresponding to one of the plurality of threads. A number M of workload partition granularities for the plurality of threads is determined, and a total execution cost for each of the M workload partition granularities is determined. An optimal granularity comprising a one of the M workload partition granularities with a lowest total execution cost is determined, and the first parallelized portion is partitioned into a plurality of workloads having the optimal granularity.

Abstract translation: 提供了一种用于异构多​​处理器便携式计算设备（PCD）中并行工作的动态粒度控制的系统和方法。 在操作期间，识别在PCD上执行的应用程序的第一并行化部分。 第一并行部分包括用于在PCD上并行执行的多个线程。 获得关于PCD的多个处理器的性能信息，所述多个处理器中的每一个对应于所述多个线程之一。 确定多个线程的M个工作负载分区粒度，并且确定每个M个工作负载分区粒度的总执行成本。 确定包括具有最低总执行成本的M个工作负载分区粒度之一的最佳粒度，并且将第一并行化部分划分为具有最佳粒度的多个工作负载。

公开(公告)号：US09081558B2

公开(公告)日：2015-07-14

申请号：US14174012

申请日：2014-02-06

Applicant: QUALCOMM Incorporated

Inventor： Sumit Sur ,  Bohuslav Rychlik ,  Steven S. Thomson ,  Ali Iranli ,  Brian J. Salsbery

IPC: G06F1/26 ,  G06F1/20 ,  G06F1/32

CPC classification number: G06F1/26 ,  G06F1/206 ,  G06F1/3203 ,  G06F1/324 ,  G06F1/3287 ,  G06F1/329 ,  Y02D10/126 ,  Y02D10/16 ,  Y02D10/171 ,  Y02D10/24

Abstract: A method of controlling power within a multicore central processing unit (CPU) is disclosed. The method may include monitoring a die temperature, determining a degree of parallelism within a workload of the CPU, and powering one or more cores of the CPU up or down based on the degree of parallelism, the die temperature, or a combination thereof.

Abstract translation: 公开了一种在多核中央处理单元（CPU）内控制功率的方法。 该方法可以包括监视模具温度，确定CPU的工作负载内的并行程度，以及基于平行度，模具温度或其组合来向上或向下驱动CPU的一个或多个核心。

公开(公告)号：US09442774B2

公开(公告)日：2016-09-13

申请号：US14195976

申请日：2014-03-04

Applicant: QUALCOMM INCORPORATED

Inventor： Sumit Sur ,  James M. Artmeier ,  Mark D. Guzzi ,  Philip T. Mueller, Jr. ,  Bohuslav Rychlik

IPC: G06F9/46 ,  G06F9/455 ,  G06F9/50 ,  G06F1/20 ,  G06F1/32 ,  G06F11/30 ,  G06F11/34

CPC classification number: G06F9/5094 ,  G06F1/206 ,  G06F1/329 ,  G06F1/3293 ,  G06F11/3058 ,  G06F11/3433 ,  Y02D10/122 ,  Y02D10/16 ,  Y02D10/22 ,  Y02D10/24 ,  Y02D10/34

Abstract: Various embodiments of methods and systems for thermally aware scheduling of workloads in a portable computing device that contains a heterogeneous, multi-processor system on a chip (“SoC”) are disclosed. Because individual processing components in a heterogeneous, multi-processor SoC may exhibit different processing efficiencies at a given temperature, and because more than one of the processing components may be capable of processing a given block of code, thermally aware workload scheduling techniques that compare performance curves of the individual processing components at their measured operating temperatures can be leveraged to optimize quality of service (“QoS”) by allocating workloads in real time, or near real time, to the processing components best positioned to efficiently process the block of code.

公开(公告)号：US09104411B2

公开(公告)日：2015-08-11

申请号：US13669043

申请日：2012-11-05

Applicant: QUALCOMM Incorporated

Inventor： Steven S. Thomson ,  Bohuslav Rychlik ,  Ali Iranli ,  Sumit Sur ,  Norman Scott Gargash

IPC: G06F1/00 ,  G06F1/32 ,  G06F1/26 ,  G06F9/50

CPC classification number: G06F1/3203 ,  G06F1/26 ,  G06F1/32 ,  G06F1/324 ,  G06F1/3296 ,  G06F9/5094 ,  Y02D10/126 ,  Y02D10/172

Abstract: Methods, systems and devices that include a dynamic clock and voltage scaling (DCVS) solution configured to compute and enforce performance guarantees to ensure that a processor does not remain in a busy state (e.g., due to transient workloads) for more than a predetermined amount of time above that which is required for that processor to complete its pre-computed steady state workload. The DCVS may adjust the frequency and/or voltage of a processor based on a variable delay to ensure that the processing core only falls behind its steady state workload by, at most, a predefined maximum amount of work, irrespective of the operating frequency or voltage of the processor.

Abstract translation: 包括动态时钟和电压缩放（DCVS）解决方案，方案，系统和设备，配置为计算和实施性能保证，以确保处理器不处于忙碌状态（例如，由于临时工作负载）超过预定量 的时间高于该处理器完成其预先计算的稳态工作负载所需的时间。 DCVS可以基于可变延迟来调整处理器的频率和/或电压，以确保处理核心仅在最大程度上预定的最大工作量之下落在其稳态工作负载之后，而与工作频率或电压无关 的处理器。

公开(公告)号：US20130074085A1

公开(公告)日：2013-03-21

申请号：US13669043

申请日：2012-11-05

Applicant: Qualcomm Incorporated

Inventor： Steven S. Thomson ,  Bohuslav Rychlik ,  Ali Iranli ,  Sumit Sur ,  Norman S. Gargash

IPC: G06F1/08 ,  G06F9/46

CPC classification number: G06F1/3203 ,  G06F1/26 ,  G06F1/32 ,  G06F1/324 ,  G06F1/3296 ,  G06F9/5094 ,  Y02D10/126 ,  Y02D10/172

Abstract: Methods, systems and devices that include a dynamic clock and voltage scaling (DCVS) solution configured to compute and enforce performance guarantees to ensure that a processor does not remain in a busy state (e.g., due to transient workloads) for more than a predetermined amount of time above that which is required for that processor to complete its pre-computed steady state workload. The DCVS may adjust the frequency and/or voltage of a processor based on a variable delay to ensure that the processing core only falls behind its steady state workload by, at most, a predefined maximum amount of work, irrespective of the operating frequency or voltage of the processor.

Abstract translation: 包括动态时钟和电压缩放（DCVS）解决方案，方案，系统和设备，配置为计算和实施性能保证，以确保处理器不处于忙碌状态（例如，由于临时工作负载）超过预定量 的时间高于该处理器完成其预先计算的稳态工作负载所需的时间。 DCVS可以基于可变延迟来调整处理器的频率和/或电压，以确保处理核心仅在最大程度上预定的最大工作量之下落在其稳态工作负载之后，而与工作频率或电压无关 的处理器。