公开(公告)号：US20180351475A1

公开(公告)日：2018-12-06

申请号：US16039751

申请日：2018-07-19

Applicant: Renesas Electronics Corporation

Inventor： Yoshihiko YOKOI ,  Yusuke OJIMA ,  Koichi YAMAZAKI

IPC: H02M7/5387 ,  H02M7/53 ,  H02M7/538 ,  H03K17/082 ,  H02M7/00

CPC classification number: H02M7/5387 ,  H01L2224/48137 ,  H01L2224/48247 ,  H02M7/003 ,  H02M7/53 ,  H02M7/538 ,  H03K17/0828

Abstract: A power conversion system includes a high-side circuit and a low-side circuit, a controller communicating with the high-side circuit and the low-side circuit; a first coupling circuit including a wire between the controller and the high-side circuit; and a second coupling circuit including a wire between the controller and the low-side circuit.

公开(公告)号：US20170170819A1

公开(公告)日：2017-06-15

申请号：US15444876

申请日：2017-02-28

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Ryo KANDA ,  Koichi YAMAZAKI ,  Hiroshi KUROIWA ,  Masatoshi MAEDA ,  Tetsu TODA

IPC: H03K17/082 ,  H03K5/24 ,  H03K17/567 ,  H01L29/40 ,  H01L29/06 ,  H01L27/092 ,  H03K3/356 ,  H01L29/78

CPC classification number: H03K17/0822 ,  H01L23/528 ,  H01L24/48 ,  H01L24/49 ,  H01L27/0922 ,  H01L29/0619 ,  H01L29/0642 ,  H01L29/0692 ,  H01L29/404 ,  H01L29/7823 ,  H01L29/7835 ,  H01L2224/0603 ,  H01L2224/48139 ,  H01L2224/48247 ,  H01L2224/4903 ,  H01L2924/00014 ,  H03K3/356 ,  H03K3/356113 ,  H03K5/01 ,  H03K5/04 ,  H03K5/24 ,  H03K5/2472 ,  H03K5/2481 ,  H03K17/567 ,  H03K2217/0081 ,  H01L2224/45099 ,  H01L2224/05599

Abstract: A driver IC includes a ring-shaped termination area, and a first area and a second area that are respectively arranged outside and inside the termination area on a layout. A sense MOS that is arranged between a floating terminal and a first sense node and is driven at a power supply voltage is formed in the termination area. A fault detection circuit that detects presence of a fault when a voltage of the first sense node is higher than a decision voltage that has been determined in advance in a period of time that a low side driver is driving a low side transistor into an ON state is formed in the first area.

公开(公告)号：US20170179849A1

公开(公告)日：2017-06-22

申请号：US15376374

申请日：2016-12-12

Applicant: Renesas Electronics Corporation

Inventor： Yoshihiko YOKOI ,  Yusuke OJIMA ,  Koichi YAMAZAKI

IPC: H02M7/539 ,  H03K17/082

CPC classification number: H02M7/5387 ,  H01L2224/48137 ,  H01L2224/48247 ,  H02M7/003 ,  H02M7/53 ,  H02M7/538 ,  H03K17/0828

Abstract: A power conversion system has a first coupling circuit including a wire between a controller and a high-side circuit and a second coupling circuit including a wire between the controller and a low-side circuit. The first coupling circuit has a diode having an anode coupled to a wire from the controller and a cathode coupled to a wire from the high-side circuit.

公开(公告)号：US20180082991A1

公开(公告)日：2018-03-22

申请号：US15824422

申请日：2017-11-28

Applicant: Renesas Electronics Corporation

Inventor： Hisashi TOYODA ,  Koichi YAMAZAKI ,  Koichi ARAI ,  Tatsuhiro SEKI

IPC: H01L25/18 ,  H01L29/10 ,  H03K17/10

CPC classification number: H01L25/18 ,  H01L24/48 ,  H01L24/49 ,  H01L25/072 ,  H01L29/1095 ,  H01L2224/0603 ,  H01L2224/48137 ,  H01L2224/48225 ,  H01L2224/49113 ,  H01L2924/00014 ,  H01L2924/10253 ,  H01L2924/10272 ,  H01L2924/1203 ,  H01L2924/1207 ,  H01L2924/13062 ,  H01L2924/13091 ,  H02P27/06 ,  H03K17/102 ,  H03K17/6871 ,  H03K17/74 ,  H03K2017/6875 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099

Abstract: A semiconductor device includes a normally-on junction FET having a first gate electrode, a first source electrode and a first drain electrode, a normally-off MOSFET having a second gate electrode, a second source electrode and a second drain electrode, and a voltage applying unit which applies a voltage to the first gate electrode. The first source electrode of the junction FET is electrically connected to the second drain electrode of the MOSFET, and the junction FET is thus connected to the MOSFET in series, and the voltage applying unit applies a second voltage with a polarity opposite to that of a first voltage applied to the first gate electrode when the junction FET is brought into an off-state, to the first gate electrode when the MOSFET is in an on-state.