公开(公告)号：US20160109896A9

公开(公告)日：2016-04-21

申请号：US13727680

申请日：2012-12-27

Applicant: Renesas Electronics Corporation

Inventor： Masaki SHIRAISHI ,  Noboru AKIYAMA ,  Tomoaki UNO ,  Nobuyoshi MATSUURA

IPC: G05F3/08

CPC classification number: G05F3/08 ,  H01L23/3107 ,  H01L23/4824 ,  H01L23/49551 ,  H01L23/49562 ,  H01L23/49575 ,  H01L24/06 ,  H01L24/37 ,  H01L24/40 ,  H01L24/41 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L25/072 ,  H01L25/16 ,  H01L29/1095 ,  H01L29/4175 ,  H01L29/41758 ,  H01L29/41766 ,  H01L29/4238 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/7835 ,  H01L2224/05554 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/0603 ,  H01L2224/371 ,  H01L2224/37124 ,  H01L2224/37147 ,  H01L2224/40095 ,  H01L2224/40245 ,  H01L2224/40247 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2224/48644 ,  H01L2224/48647 ,  H01L2224/49111 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/49431 ,  H01L2224/73221 ,  H01L2224/84801 ,  H01L2224/8485 ,  H01L2224/85375 ,  H01L2924/01002 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/0102 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01056 ,  H01L2924/01059 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01083 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/12032 ,  H01L2924/12036 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H02M7/003 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: In order to reduce parasitic inductance of a main circuit in a power supply circuit, a non-insulated DC-DC converter is provided having a circuit in which a power MOS·FET for a high-side switch and a power MOS·FET for a low-side switch are connected in series. In the non-insulated DC-DC converter, the power MOS·FET for the high-side switch is formed by a p channel vertical MOS·FET, and the power MOS·FET for the low-side switch is formed by an n channel vertical MOS·FET. Thus, a semiconductor chip formed with the power MOS·FET for the high-side switch and a semiconductor chip formed with the power MOS·FET for the low-side switch are mounted over the same die pad and electrically connected to each other through the die pad.