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公开(公告)号：US20050114586A1
公开(公告)日：2005-05-26
申请号：US10723405
申请日：2003-11-25
申请人： Frank Brice , Richard Errickson , Mark Farrell , Charles Gainey , Thomas Gregg , Carol Hernandez , Damian Osisek , Donald Schmidt
发明人： Frank Brice , Richard Errickson , Mark Farrell , Charles Gainey , Thomas Gregg , Carol Hernandez , Damian Osisek , Donald Schmidt
CPC分类号： G06F12/0292 , G06F9/45537 , G06F2212/206
摘要： A method of performing memory mapped input output operations to an alternate address space comprising: establishing a first instruction directed to a first memory mapped input output alternate address space associated with an adapter to store data in accordance with a definition of a z/Architecture; establishing a second instruction directed to the first memory mapped input output alternate address space associated with an adapter to load data in accordance with a definition of a z/Architecture; allocating at least one of a real resource and a virtual resource associated with the first alternate address space to a process; ensuring that the selected process corresponds with the process to which the resource is allocated. The process issues at least one of the first instruction and the second instruction and thereby causes execution of at least one of the store and load with the first alternate address space.
摘要翻译： 一种向备用地址空间执行存储器映射输入输出操作的方法，包括：根据z / Architecture的定义，建立指向与适配器相关联的第一存储器映射输入输出备用地址空间的第一指令以存储数据; 建立指向与适配器相关联的第一存储器映射输入输出交替地址空间的第二指令，以根据z / Architecture的定义加载数据; 将与所述第一替代地址空间相关联的实际资源和虚拟资源中的至少一个分配给进程; 确保所选择的进程与分配资源的进程相对应。 该过程发生第一指令和第二指令中的至少一个，从而导致使用第一替代地址空间执行存储和加载中的至少一个。
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公开(公告)号：US20050114623A1
公开(公告)日：2005-05-26
申请号：US10723506
申请日：2003-11-25
申请人： David Craddock , Richard Errickson , Mark Farrell , Charles Gainey , Thomas Gregg , Carol Hernandez , Donald Schmidt
发明人： David Craddock , Richard Errickson , Mark Farrell , Charles Gainey , Thomas Gregg , Carol Hernandez , Donald Schmidt
CPC分类号： G06F9/30003 , G06F9/3004 , G06F9/30043 , G06F9/30087 , G06F9/342
摘要： A method of managing memory mapped input output operations to an alternate address space comprising: executing a first instruction directed to a first memory mapped input output alternate address space of a machine associated with a first adapter to allocate a resource associated with the first adapter to a process in accordance with a definition of a z/Architecture; wherein a selected process issues at least one of a load and a store instruction executed in a problem state of the machine to a selected address location of a selected resource. The method further includes ensuring that the selected resource corresponds with the allocated resource and determining that the selected process corresponds with the process to which the resource is allocated.
摘要翻译： 一种将存储器映射的输入输出操作管理到备用地址空间的方法，包括：执行指向与第一适配器相关联的机器的第一存储器映射输入输出备用地址空间的第一指令，以将与第一适配器相关联的资源分配给 过程按照az / Architecture的定义; 其中所选择的过程将所述机器的问题状态中执行的加载和存储指令中的至少一个发出到所选择的资源的所选地址位置。 该方法还包括确保所选择的资源对应于所分配的资源，并确定所选择的进程与分配资源的进程相对应。
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公开(公告)号：US20050114555A1
公开(公告)日：2005-05-26
申请号：US10723044
申请日：2003-11-25
申请人： Richard Errickson , Mark Farrell , Charles Gainey , Thomas Gregg , Carol Hernandez , Donald Schmidt
发明人： Richard Errickson , Mark Farrell , Charles Gainey , Thomas Gregg , Carol Hernandez , Donald Schmidt
CPC分类号： G06F12/1475 , G06F9/30003 , G06F9/342 , G06F12/063
摘要： A method of performing memory mapped input output operations to an alternate address space comprising: establishing a first instruction directed to a first memory mapped input output alternate address space associated with an adapter to store data in accordance with a definition of a z/Architecture; establishing a second instruction directed to the first memory mapped input output alternate address space associated with an adapter to load data in accordance with the definition(s) of the z/Architecture; and wherein a process issues at least one of the first instruction and the second instruction and thereby causes execution of at least one of the store and load with the first alternate address space.
摘要翻译： 一种向备用地址空间执行存储器映射输入输出操作的方法，包括：根据z / Architecture的定义，建立指向与适配器相关联的第一存储器映射输入输出备用地址空间的第一指令以存储数据; 建立指向与适配器相关联的第一存储器映射输入输出备用地址空间的第二指令，以根据z / Architecture的定义加载数据; 并且其中，处理发出所述第一指令和所述第二指令中的至少一个，从而使得所述存储器和所述负载中的至少一个与所述第一备用地址空间一起执行。
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公开(公告)号：US20070140266A1
公开(公告)日：2007-06-21
申请号：US11676555
申请日：2007-02-20
申请人： Ugochukwu Njoku , Frank Brice , David Craddock , Richard Errickson , Mark Farrell , Charles Gainey , Donald Schmidt , Gustav Sittmann
发明人： Ugochukwu Njoku , Frank Brice , David Craddock , Richard Errickson , Mark Farrell , Charles Gainey , Donald Schmidt , Gustav Sittmann
IPC分类号： H04L12/56
CPC分类号： G06F13/4022 , G06F13/102
摘要： A communication port of a communications interface of an information handling system comprises a plurality of virtual ports. A first command is issued to obtain information indicating a number of images of virtual ports supportable by the communications interface. A second command is then issued requesting the communications interface to virtualize the communication port. In response to the second command, one or more virtual switches are then configured to connect to the communication port, each virtual switch including a plurality of virtual ports, such that the one or more virtual switches are configured in a manner sufficient to support the number of images of virtual ports indicated by the obtained information. Thereafter, upon request via issuance of a third command, a logical link is established between one of the virtual ports of one of the virtual switches and a communicating element of the information handling system.
摘要翻译： 信息处理系统的通信接口的通信端口包括多个虚拟端口。 发出第一命令以获得指示可由通信接口支持的虚拟端口的图像数量的信息。 然后发出请求通信接口虚拟通信端口的第二命令。 响应于第二命令，一个或多个虚拟交换机然后被配置为连接到通信端口，每个虚拟交换机包括多个虚拟端口，使得一个或多个虚拟交换机被配置为足以支持数量 由所获得的信息指示的虚拟端口的图像。 此后，根据通过发出第三命令的请求，在一个虚拟交换机的虚拟端口之一和信息处理系统的通信元件之间建立逻辑链路。
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5.发明申请Virtualization of an I/O adapter port using enablement and activation functions 有权使用启用和激活功能虚拟化I / O适配器端口公开(公告)号：US20060230219A1
公开(公告)日：2006-10-12
申请号：US11100837
申请日：2005-04-07
申请人： Ugochukwu Njoku , Frank Brice , David Craddock , Richard Errickson , Mark Farrell , Charles Gainey , Donald Schmidt , Gustav Sittmann
发明人： Ugochukwu Njoku , Frank Brice , David Craddock , Richard Errickson , Mark Farrell , Charles Gainey , Donald Schmidt , Gustav Sittmann
IPC分类号： G06F13/00
CPC分类号： G06F13/4022 , G06F13/102
摘要： A method is provided for configuring a communication port of a communications interface of an information handling system into a plurality of virtual ports. A first command is issued to obtain information indicating a number of images of virtual ports supportable by the communications interface. A second command is then issued requesting the communications interface to virtualize the communication port. In response to the second command, one or more virtual switches are then configured to connect to the communication port, each virtual switch including a plurality of virtual ports, such that the one or more virtual switches are configured in a manner sufficient to support the number of images of virtual ports indicated by the obtained information. Thereafter, upon request via issuance of a third command, a logical link is established between one of the virtual ports of one of the virtual switches and a communicating element of the information handling system.
摘要翻译： 提供了一种将信息处理系统的通信接口的通信端口配置成多个虚拟端口的方法。 发出第一命令以获得指示可由通信接口支持的虚拟端口的图像数量的信息。 然后发出请求通信接口虚拟通信端口的第二命令。 响应于第二命令，一个或多个虚拟交换机然后被配置为连接到通信端口，每个虚拟交换机包括多个虚拟端口，使得一个或多个虚拟交换机被配置为足以支持数量 由所获得的信息指示的虚拟端口的图像。 此后，根据通过发出第三命令的请求，在一个虚拟交换机的虚拟端口之一和信息处理系统的通信元件之间建立逻辑链路。
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6.发明申请公开(公告)号：US20060230185A1
公开(公告)日：2006-10-12
申请号：US11100846
申请日：2005-04-07
申请人： Richard Errickson , David Craddock , Thomas Gregg , Donald Schmidt , Jeffrey Turner , Bruce Walk
发明人： Richard Errickson , David Craddock , Thomas Gregg , Donald Schmidt , Jeffrey Turner , Bruce Walk
IPC分类号： G06F15/16
CPC分类号： H04L49/35 , H04L49/30 , H04L49/358 , H04L49/70 , H04L67/1097
摘要： A processor node of a network is provided which includes one or more processors and a virtualized channel adapter. The virtualized channel adapter is operable to reference a table to determine whether a destination of the communication is supported by the virtualized channel adapter. When the destination is supported for routing via hardware, the virtualized channel adapter is operable to route the communication via hardware to at least one of a physical port and a logical port of the virtualized channel adapter. Otherwise, when the destination is not supported for routing via hardware, the virtualized channel adapter is operable to route the communication via firmware to a virtual port of the virtualized channel adapter. A corresponding method and a recording medium having information recorded thereon for performing such method are also provided herein.
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公开(公告)号：US20060230208A1
公开(公告)日：2006-10-12
申请号：US11100845
申请日：2005-04-07
申请人： Thomas Gregg , Richard Arndt , David Craddock , Richard Errickson , Ronald Fuhs
发明人： Thomas Gregg , Richard Arndt , David Craddock , Richard Errickson , Ronald Fuhs
IPC分类号： G06F13/24
CPC分类号： G06F13/24
摘要： An information processing system is provided which includes an interrupt table including a plurality of entries relating to interrupts requested by entries in a plurality of event queues. The entries of the interrupt table reference identifiers, and the identifiers are assigned to events from a pool of identifiers in accordance with an order in which the events occur.
摘要翻译： 提供了一种信息处理系统，其包括中断表，该中断表包括与多个事件队列中的条目所请求的中断有关的多个条目。 中断表参考标识符的条目和标识符根据事件发生的顺序从标识符池分配给事件。
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8.发明申请System, method, and article of manufacture for synchronizing time of day clocks on first and second computers 有权用于在第一和第二计算机上同步时钟的系统，方法和制品公开(公告)号：US20060133426A1
公开(公告)日：2006-06-22
申请号：US11016465
申请日：2004-12-17
申请人： David Craddock , Richard Errickson , Thomas Gregg , Bruce Walk
发明人： David Craddock , Richard Errickson , Thomas Gregg , Bruce Walk
摘要： A system, method, and article of manufacture for synchronizing first and second time-of-day clocks on first and second computers, respectively, are provided. The first and second computers have first and second network interface cards with third and fourth clocks, respectively, thereon. The system utilizes time stamp values generated by the third and fourth clocks to synchronize the first and second time-of-day clocks.
摘要翻译： 提供了分别在第一和第二计算机上同步第一和第二时钟的系统，方法和制品。 第一和第二计算机具有分别具有第三和第四时钟的第一和第二网络接口卡。 系统利用由第三和第四时钟产生的时间戳值来同步第一和第二时钟时钟。
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公开(公告)号：US20060037027A1
公开(公告)日：2006-02-16
申请号：US11247888
申请日：2005-10-11
申请人： Scott Carlson , David Elko , Richard Errickson
发明人： Scott Carlson , David Elko , Richard Errickson
IPC分类号： G06F9/46
CPC分类号： G06F1/12 , G06F1/14 , G06F3/0611 , G06F3/0655 , G06F3/0688 , G06F9/5077 , G06F9/546 , G06F12/0238 , G06F2212/202 , H04J3/0667 , H04J3/0697 , H04L29/0854
摘要： Disclosed are a method of and system for providing time synchronization among first and second computer systems, where each of the computer systems includes hardware, operating system software and a layer of microcode operating between said hardware and said software. The method comprises the steps of using the microcode of the first computer system to provide a first timestamp, using the microcode of the second computer system to provide a second timestamp and a third timestamp, and using the microcode of the first computer system to provide a fourth timestamp. The method comprises the further steps of using the first, second, third and fourth timestamps to determine a timing difference between the first and second computer systems, and adjusting the timing among said first and second computer systems on the basis of said determined timing difference. Preferably, the first and second computer systems are connected together by a point-to-point link; and the first timestamp is sent from the first computer system to the second computer system, and the second and third timestamps are sent from the second computer system to the first computer system over that point-to-point link.
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