公开(公告)号：US10475504B2

公开(公告)日：2019-11-12

申请号：US15334380

申请日：2016-10-26

Applicant: Samsung Electronics Co., Ltd.

Inventor： Se-Young Kim ,  Junbae Kim

IPC: H02H9/00 ,  G11C11/4078 ,  H01L27/02 ,  H01L27/108 ,  H02H9/04 ,  G11C5/14 ,  G11C11/4074

Abstract: Disclosed is an integrated protecting circuit, which detects ESD and EOS pulses to prevent an over-voltage from being applied to a semiconductor device. The integrated protecting circuit includes a first detector configured to detect an occurrence of an electrical over-stress between a first node to which a first voltage is applied and a second node to which a second voltage is applied, a second detector configured to detect an occurrence of an electrostatic discharge between the first and second nodes, a determination circuit configured to receive separate outputs of the first and second detectors at the same time and to generate a control signal, and a clamping device configured to perform a turn on/off operation in response to the control signal such that a voltage between the first and second nodes is clamped into a constant voltage.

公开(公告)号：US20240008265A1

公开(公告)日：2024-01-04

申请号：US18216269

申请日：2023-06-29

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jaepil Lee ,  Junbae Kim

IPC: H10B12/00 ,  H01L23/522 ,  H01F17/00

CPC classification number: H10B12/482 ,  H01L28/90 ,  H01L23/5227 ,  H01L28/10 ,  H01F17/0013 ,  H10B12/50 ,  H10B12/34 ,  H10B12/315 ,  H01F2017/0073

Abstract: A semiconductor device includes a lower structure, a data storage structure on the lower structure, and an inductor structure on the lower structure, where the data storage structure includes first electrodes extending in a vertical direction perpendicular to an upper surface of the lower structure, a second electrode provided on the first electrodes, and a dielectric layer between the first electrodes and the second electrode, and where the inductor structure includes an inductor conductive pattern at a level that is substantially the same as a level of the first electrodes.

公开(公告)号：US20240030128A1

公开(公告)日：2024-01-25

申请号：US18204556

申请日：2023-06-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jaepil Lee ,  Junbae Kim ,  Jinkwan Park

IPC: H01L23/522 ,  H10B12/00

CPC classification number: H01L23/5227 ,  H10B12/00

Abstract: A semiconductor device may include a substrate, an element layer including circuit elements arranged on the substrate, a wiring layer on the element layer, and a redistribution layer on the wiring layer. The redistribution layer may include a redistribution insulating layer and a redistribution conductive layer on the redistribution insulating layer. The redistribution conductive layer may include a connection pad and first and second inductor structures respectively including first and second inductor redistribution lines having a planar coil shape, and a connection pad. The first and second inductor redistribution lines respectively included in the first and second inductor structures may have different thicknesses.

公开(公告)号：US11137435B2

公开(公告)日：2021-10-05

申请号：US16272304

申请日：2019-02-11

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Junbae Kim ,  Yongho Cho

IPC: G01R31/00 ,  G01R1/04 ,  G01R31/28 ,  G01R31/26

Abstract: A semiconductor device test system may include a body providing an internal space, in which a test device is loaded, and a cover coupled to the body to cover the internal space. The cover may include a first cover including first openings two-dimensionally arranged and a second cover including second openings two-dimensionally arranged. An arrangement of the first openings may be different from an arrangement of the second openings.