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    WRITE ABORT DETECTION FOR MULTI-STATE MEMORIES
    4.
    发明申请
    WRITE ABORT DETECTION FOR MULTI-STATE MEMORIES 审中-公开

    公开(公告)号：US20170243638A1

    公开(公告)日：2017-08-24

    申请号：US15588968

    申请日：2017-05-08

    Applicant: SANDISK TECHNOLOGIES LLC

    Inventor： Cynthia Hua-Ling Hsu ,  Aaron Lee ,  Abhijeet Manohar ,  Deepanshu Dutta

    IPC: G11C11/56

    CPC classification number: G11C11/5628 ,  G11C11/5642 ,  G11C16/3459

    Abstract: Techniques are presented to determine whether a multi-state memory device suffers has a write operation aborted prior to its completion. In an example where all the word lines of a memory block is first programmed to an intermediate level (such as 2 bits per cells) before then being fully written (such as 4 bits per cell), after determining that intermediate programming pass completed, the block is searched using the read level for the highest multi-state to find the last fully programmed word line, after which the next word line is checked with the lowest state's read level to determine whether the full programming had begun on this word line. In an example where each word line is fully written before beginning the next word line of the block, after determining the first erased word line, the preceding word line is checked as the highest state to see if programming completed and, if not, checked at the lowest read level to see if programming began.

    Systems and Methods for Performing Data Recovery in a Memory System
    5.
    发明申请
    Systems and Methods for Performing Data Recovery in a Memory System 审中-公开
    在内存系统中执行数据恢复的系统和方法

    公开(公告)号：US20170004052A1

    公开(公告)日：2017-01-05

    申请号：US15264860

    申请日：2016-09-14

    Applicant: SanDisk Technologies LLC

    Inventor： Abhijeet Manohar ,  Chris Avila

    IPC: G06F11/14

    CPC classification number: G06F11/1469 ,  G06F11/1068 ,  G06F11/108 ,  G06F11/1451 ,  G06F11/16 ,  G06F12/0875 ,  G06F12/128 ,  G06F2201/805 ,  G06F2201/82 ,  G06F2201/84 ,  G06F2212/222

    Abstract: Systems and methods for performing data recovery are disclosed. A controller of a memory system may detect an error at a first page of memory and identify a data keep cache associated with the first page, the data keep cache associated with a primary XOR sum. The controller may further sense data stored at a second page and move the data to a first latch of the memory; sense data stored at a third page such that the data is present in a second latch of the memory; and calculate a restoration XOR sum based on the data of the second page and the data of the third page. The controller may further calculate the data of the first page based on the primary XOR sum and the restoration XOR sum, and restore the data of the first page.

    Abstract translation: 公开了用于执行数据恢复的系统和方法。 存储器系统的控制器可以检测存储器的第一页面上的错误，并且识别与第一页面相关联的数据保持缓存，数据保持高速缓存与主XOR和相关联。 控制器还可以感测存储在第二页面上的数据并将数据移动到存储器的第一锁存器; 感测存储在第三页的数据，使得数据存在于存储器的第二锁存器中; 并且基于第二页面的数据和第三页面的数据来计算恢复XOR和。 控制器还可以基于主XOR和还原XOR和计算第一页的数据，并恢复第一页的数据。

    Inherent adaptive trimming
    6.
    发明授权
    Inherent adaptive trimming 有权

    公开(公告)号：US10592122B2

    公开(公告)日：2020-03-17

    申请号：US14675261

    申请日：2015-03-31

    Applicant: SANDISK TECHNOLOGIES LLC

    Inventor： Abhijeet Manohar ,  Daniel Tuers ,  Sathyanarayanan Subramanian ,  Judah Gamliel Hahn

    IPC: G06F3/06

    Abstract: A memory system may use adaptive trimming to control throughput and traffic from the host to/from the memory. The trimming parameters of memory may be adaptively changed based on the data rate from the host. The programming speed may be slowed in order to reduce wear and improve endurance. In particular, the data rate for the transfer of data from a data buffer to the memory (e.g. NAND flash) may be matched to the host data rate. This programming speed reduction may be triggered upon prediction of idle times in the host bus.

    Data coding
    7.
    发明授权
    Data coding 有权

    公开(公告)号：US10216575B2

    公开(公告)日：2019-02-26

    申请号：US15073215

    申请日：2016-03-17

    Applicant: SANDISK TECHNOLOGIES LLC

    Inventor： Rishi Gautam Mukhopadhyay ,  Rajesh Kumar Neermarga ,  Abhijeet Manohar

    IPC: G11C29/00 ,  G06F11/10 ,  G11C16/10 ,  G11C16/26 ,  G11C7/10 ,  G11C11/56

    Abstract: A data storage device includes an encoder and a memory that includes multiple storage elements. The encoder is configured to receive input data and to map at least one input group of bits of the input data to generate output data including at least one output group of bits. Each input group of bits of the at least one input group of bits and each output group of bits of the at least one output group of bits has the same number of bits. Each storage element of the multiple storage elements is configured to be programmed to a voltage state corresponding to an output group of bits of the at least one group of bits associated with the storage element.

    Write abort detection for multi-state memories
    9.
    发明授权
    Write abort detection for multi-state memories 有权

    公开(公告)号：US09899077B2

    公开(公告)日：2018-02-20

    申请号：US15588968

    申请日：2017-05-08

    Applicant: SANDISK TECHNOLOGIES LLC

    Inventor： Cynthia Hua-Ling Hsu ,  Aaron Lee ,  Abhijeet Manohar ,  Deepanshu Dutta

    IPC: G11C11/56

    CPC classification number: G11C11/5628 ,  G11C11/5642 ,  G11C16/3459

    Abstract: Techniques are presented to determine whether a multi-state memory device suffers has a write operation aborted prior to its completion. In an example where all the word lines of a memory block is first programmed to an intermediate level (such as 2 bits per cells) before then being fully written (such as 4 bits per cell), after determining that intermediate programming pass completed, the block is searched using the read level for the highest multi-state to find the last fully programmed word line, after which the next word line is checked with the lowest state's read level to determine whether the full programming had begun on this word line. In an example where each word line is fully written before beginning the next word line of the block, after determining the first erased word line, the preceding word line is checked as the highest state to see if programming completed and, if not, checked at the lowest read level to see if programming began.

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