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公开(公告)号:US20240377682A1
公开(公告)日:2024-11-14
申请号:US18779714
申请日:2024-07-22
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Ryo HATSUMI , Daisuke KUBOTA , Hiroyuki MIYAKE
IPC: G02F1/1343 , G02F1/1333 , G02F1/1337 , G02F1/1362
Abstract: A display device with less light leakage and excellent contrast is provided. A display device having a high aperture ratio and including a large-capacitance capacitor is provided. A display device in which wiring delay due to parasitic capacitance is reduced is provided. A display device includes a transistor over a substrate, a pixel electrode connected to the transistor, a signal line electrically connected to the transistor, a scan line electrically connected to the transistor and intersecting with the signal line, and a common electrode overlapping with the pixel electrode and the signal line with an insulating film provided therebetween. The common electrode includes stripe regions extending in a direction intersecting with the signal line.
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公开(公告)号:US20240212774A1
公开(公告)日:2024-06-27
申请号:US18596906
申请日:2024-03-06
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Seiko AMANO , Kouhei TOYOTAKA , Hiroyuki MIYAKE , Aya MIYAZAKI , Hideaki SHISHIDO , Koji KUSUNOKI
CPC classification number: G11C19/28 , G09G3/3677 , G09G3/3696 , G11C19/184 , H01L25/03 , H01L27/1222 , H01L27/1225 , H01L27/124 , H01L27/1251 , H01L27/127 , H01L27/1288 , H03K19/0013 , H05K7/02 , G09G2300/0809 , G09G2310/0286 , H01L2924/0002
Abstract: An object is to provide a pulse signal output circuit capable of operating stably and a shift register including the pulse signal output circuit. A pulse signal output circuit according to one embodiment of the disclosed invention includes first to tenth transistors. The ratio W/L of the channel width W to the channel length L of the first transistor and W/L of the third transistor are each larger than W/L of the sixth transistor. W/L of the fifth transistor is larger than W/L of the sixth transistor. W/L of the fifth transistor is equal to W/L of the seventh transistor. W/L of the third transistor is larger than W/L of the fourth transistor. With such a structure, a pulse signal output circuit capable of operating stably and a shift register including the pulse signal output circuit can be provided.
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公开(公告)号:US20240105737A1
公开(公告)日:2024-03-28
申请号:US18534908
申请日:2023-12-11
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Hisao IKEDA , Kouhei TOYOTAKA , Hideaki SHISHIDO , Hiroyuki MIYAKE , Kohei YOKOYAMA , Yasuhiro JINBO , Yoshitaka DOZEN , Takaaki NAGATA , Shinichi HIRASA
IPC: H01L27/12 , G09G3/20 , G09G3/3233 , H01L29/786 , H10K59/131 , H10K59/35
CPC classification number: H01L27/124 , G09G3/2003 , G09G3/3233 , H01L27/1225 , H01L27/1266 , H01L29/78648 , H10K59/131 , H10K59/352 , H10K59/353 , G09G3/3648 , G09G2300/0452 , G09G2300/0842 , G09G2320/0295 , G09G2320/043 , G09G2320/0693
Abstract: Provided is a display device with extremely high resolution, a display device with higher display quality, a display device with improved viewing angle characteristics, or a flexible display device. Same-color subpixels are arranged in a zigzag pattern in a predetermined direction. In other words, when attention is paid to a subpixel, another two subpixels exhibiting the same color as the subpixel are preferably located upper right and lower right or upper left and lower left. Each pixel includes three subpixels arranged in an L shape. In addition, two pixels are combined so that pixel units including subpixel are arranged in matrix of 3×2.
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公开(公告)号:US20230288758A1
公开(公告)日:2023-09-14
申请号:US18142341
申请日:2023-05-02
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Ryo HATSUMI , Daisuke KUBOTA , Hiroyuki MIYAKE
IPC: G02F1/1343 , G02F1/1333 , G02F1/1337 , G02F1/1362
CPC classification number: G02F1/134318 , G02F1/133345 , G02F1/133707 , G02F1/134363 , G02F1/13624 , G02F2201/121 , G02F1/134345 , G02F1/134372
Abstract: A display device with less light leakage and excellent contrast is provided. A display device having a high aperture ratio and including a large-capacitance capacitor is provided. A display device in which wiring delay due to parasitic capacitance is reduced is provided. A display device includes a transistor over a substrate, a pixel electrode connected to the transistor, a signal line electrically connected to the transistor, a scan line electrically connected to the transistor and intersecting with the signal line, and a common electrode overlapping with the pixel electrode and the signal line with an insulating film provided therebetween. The common electrode includes stripe regions extending in a direction intersecting with the signal line.
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公开(公告)号:US20230255089A1
公开(公告)日:2023-08-10
申请号:US18136665
申请日:2023-04-19
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Hiroyuki MIYAKE , Hisao IKEDA
IPC: H10K59/86 , H01L23/00 , G06F1/16 , H01K1/00 , H10K50/814 , H10K50/824 , H10K59/18 , H10K77/10
CPC classification number: H10K59/86 , H01L24/50 , G06F1/1652 , H01K1/00 , H10K50/814 , H10K50/824 , H10K59/18 , H10K77/111 , Y02E10/549 , H10K59/131
Abstract: To provide a display device that is suitable for increasing in size, a display device in which display unevenness is suppressed, or a display device that can display an image along a curved surface. The display device includes a first display panel and a second display panel each including a pair of substrates. The first display panel and the second display panel each include a first region which can transmit visible light, a second region which can block visible light, and a third region which can perform display. The third region of the first display panel and the first region of the second display panel overlap each other. The third region of the first display panel and the second region of the second display panel do not overlap each other.
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公开(公告)号:US20220328529A1
公开(公告)日:2022-10-13
申请号:US17576024
申请日:2022-01-14
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Atsushi UMEZAKI , Hiroyuki MIYAKE
Abstract: To suppress fluctuation in the threshold voltage of a transistor, to reduce the number of connections of a display panel and a driver IC, to achieve reduction in power consumption of a display device, and to achieve increase in size and high definition of the display device. A gate electrode of a transistor which easily deteriorates is connected to a wiring to which a high potential is supplied through a first switching transistor and a wiring to which a low potential is supplied through a second switching transistor, a clock signal is input to a gate electrode of the first switching transistor, and an inverted clock signal is input to a gate electrode of the second switching transistor. Thus, the high potential and the low potential are alternately applied to the gate electrode of the transistor which easily deteriorates.
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公开(公告)号:US20220284976A1
公开(公告)日:2022-09-08
申请号:US17749309
申请日:2022-05-20
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Seiko AMANO , Kouhei TOYOTAKA , Hiroyuki MIYAKE , Aya MIYAZAKI , Hideaki SHISHIDO , Koji KUSUNOKI
Abstract: An object is to provide a pulse signal output circuit capable of operating stably and a shift register including the pulse signal output circuit. A pulse signal output circuit according to one embodiment of the disclosed invention includes first to tenth transistors. The ratio W/L of the channel width W to the channel length L of the first transistor and W/L of the third transistor are each larger than W/L of the sixth transistor. W/L of the fifth transistor is larger than W/L, of the sixth transistor. W/L of the fifth transistor is equal to W/L of the seventh transistor. W/L of the third transistor is larger than W/L of the fourth transistor. With such a structure, a pulse signal output circuit capable of operating stably and a shift register including the pulse signal output circuit can be provided.
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公开(公告)号:US20220068977A1
公开(公告)日:2022-03-03
申请号:US17512855
申请日:2021-10-28
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei YAMAZAKI , Junichiro SAKATA , Hiroyuki MIYAKE , Hideaki KUWABARA , Tatsuya TAKAHASHI
IPC: H01L27/12 , H01L29/45 , G02F1/1368 , H01L29/786
Abstract: An aperture ratio of a semiconductor device is improved. A driver circuit and a pixel are provided over one substrate, and a first thin film transistor in the driver circuit and a second thin film transistor in the pixel each include a gate electrode layer, a gate insulating layer over the gate electrode layer, an oxide semiconductor layer over the gate insulating layer, source and drain electrode layers over the oxide semiconductor layer, and an oxide insulating layer in contact with part of the oxide semiconductor layer over the gate insulating layer, the oxide semiconductor layer, and the source and drain electrode layers. The gate electrode layer, the gate insulating layer, the oxide semiconductor layer, the source and drain electrode layers, and the oxide insulating layer of the second thin film transistor each have a light-transmitting property.
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公开(公告)号:US20220005536A1
公开(公告)日:2022-01-06
申请号:US17480311
申请日:2021-09-21
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Masayuki SAKAKURA , Yuugo GOTO , Hiroyuki MIYAKE , Daisuke KUROSAKI
Abstract: A semiconductor device in which a decrease in the yield by electrostatic destruction can be prevented is provided. A scan line driver circuit for supplying a signal for selecting a plurality of pixels to a scan line includes a shift register for generating the signal. One conductive film functioning as respective gate electrodes of a plurality of transistors in the shift register is divided into a plurality of conductive films. The divided conductive films are electrically connected to each other by a conductive film which is formed in a layer different from the divided conductive films are formed. The plurality of transistors includes a transistor on an output side of the shift register.
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公开(公告)号:US20210390921A1
公开(公告)日:2021-12-16
申请号:US17458656
申请日:2021-08-27
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Seiko AMANO , Hiroyuki MIYAKE
IPC: G09G3/36 , G06F3/038 , G09G3/3266 , G11C19/28 , G06F1/3234 , H01L27/12
Abstract: In a pulse output circuit in a shift register, a power source line which is connected to a transistor in an output portion connected to a pulse output circuit at the next stage is set to a low-potential drive voltage, and a power source line which is connected to a transistor in an output portion connected to a scan signal line is set to a variable potential drive voltage. The variable potential drive voltage is the low-potential drive voltage in a normal mode, and can be either a high-potential drive voltage or the low-potential drive voltage in a batch mode. In the batch mode, display scan signals can be output to a plurality of scan signal lines at the same timing in a batch.
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