公开(公告)号：US11587866B2

公开(公告)日：2023-02-21

申请号：US17000165

申请日：2020-08-21

Applicant: STMICROELECTRONICS S.r.l.

Inventor： Francesco Maria Pipia ,  Ivan Venegoni ,  Annamaria Votta ,  Francesca Milanesi ,  Samuele Sciarrillo ,  Paolo Colpani

IPC: H01L23/522 ,  H01L21/768 ,  H01L23/532 ,  H01L23/528 ,  H01L23/525

Abstract: A method of manufacturing an integrated electronic device including a semiconductor body and a passivation structure including a frontal dielectric layer bounded by a frontal surface. A hole is formed extending into the frontal surface and through the frontal dielectric layer. A conductive region is formed in the hole. A barrier layer is formed in the hole and extends into the hole. A first coating layer covers a top and sides of a redistribution region of the conductive region and a second coating layer covers is formed covering the first coating layer. A capillary opening is formed extending into the first and second coating layers to the barrier layer. A cavity is formed between the redistribution region and the frontal surface and is bounded on one side by the first coating layer and on the other by the barrier structure by passing an aqueous solution through the capillary opening.

公开(公告)号：US12021046B2

公开(公告)日：2024-06-25

申请号：US17944983

申请日：2022-09-14

Applicant: STMICROELECTRONICS S.r.l.

Inventor： Paolo Colpani ,  Samuele Sciarrillo ,  Ivan Venegoni ,  Francesco Maria Pipia ,  Simone Bossi ,  Carmela Cupeta

IPC: H01L23/00 ,  H01L21/02 ,  H01L21/768 ,  H01L23/528

CPC classification number: H01L24/03 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/76802 ,  H01L21/76877 ,  H01L23/528 ,  H01L24/05 ,  H01L2224/0231 ,  H01L2224/0233 ,  H01L2224/0239 ,  H01L2224/024 ,  H01L2224/03464 ,  H01L2224/03614 ,  H01L2224/04042 ,  H01L2224/05024 ,  H01L2224/05083 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05184 ,  H01L2224/05664 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01046 ,  H01L2924/0132 ,  H01L2924/05042 ,  H01L2924/05442 ,  H01L2924/20102 ,  H01L2924/20103 ,  H01L2924/20104 ,  H01L2924/20105 ,  H01L2924/20106 ,  H01L2924/20107

Abstract: A method of manufacturing a redistribution layer includes: forming an insulating layer on a wafer, delimited by a top surface and a bottom surface in contact with the wafer; forming a conductive body above the top surface of the insulating layer; forming a first coating region extending around and above the conductive body, in contact with the conductive body, and in contact with the top surface of the insulating layer in correspondence of a bottom surface of the first coating region; applying a thermal treatment to the wafer in order to modify a residual stress of the first coating region, forming a gap between the bottom surface of the first coating region and the top surface of the insulating layer; forming, after applying the thermal treatment, a second coating region extending around and above the first coating region, filling said gap and completely sealing the first coating region.

公开(公告)号：US11469194B2

公开(公告)日：2022-10-11

申请号：US16535029

申请日：2019-08-07

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Paolo Colpani ,  Samuele Sciarrillo ,  Ivan Venegoni ,  Francesco Maria Pipia ,  Simone Bossi ,  Carmela Cupeta

IPC: H01L23/00 ,  H01L21/768 ,  H01L23/528 ,  H01L21/02

Abstract: A method of manufacturing a redistribution layer includes: forming an insulating layer on a wafer, delimited by a top surface and a bottom surface in contact with the wafer; forming a conductive body above the top surface of the insulating layer; forming a first coating region extending around and above the conductive body, in contact with the conductive body, and in contact with the top surface of the insulating layer in correspondence of a bottom surface of the first coating region; applying a thermal treatment to the wafer in order to modify a residual stress of the first coating region, forming a gap between the bottom surface of the first coating region and the top surface of the insulating layer; forming, after applying the thermal treatment, a second coating region extending around and above the first coating region, filling said gap and completely sealing the first coating region.

公开(公告)号：US10790226B2

公开(公告)日：2020-09-29

申请号：US16044186

申请日：2018-07-24

Applicant: STMicroelectronics S.r.l.

Inventor： Francesco Maria Pipia ,  Ivan Venegoni ,  Annamaria Votta ,  Francesca Milanesi ,  Samuele Sciarrillo ,  Paolo Colpani

IPC: H01L23/522 ,  H01L21/768 ,  H01L23/532 ,  H01L23/528 ,  H01L23/525

Abstract: An integrated electronic device includes a semiconductor body and a passivation structure including a frontal dielectric layer bounded by a frontal surface. A conductive region forms a via region, extending into a hole through the frontal dielectric layer. An overlaid redistribution region extends over the frontal surface. A barrier structure includes at least a first barrier region extending into the hole and surrounding the via region. The first barrier region extends over the frontal surface. A first coating layer covers the top and the sides of the redistribution region and a second coating layer covers the first coating layer. A cavity extends between the redistribution region and the frontal surface and is bounded on one side by the first coating layer and on the other by the barrier structure.

公开(公告)号：US20190035728A1

公开(公告)日：2019-01-31

申请号：US16044190

申请日：2018-07-24

Applicant: STMicroelectronics S.r.l.

Inventor： Ivan Venegoni ,  Francesca Milanesi ,  Francesco Maria Pipia ,  Samuele Sciarrillo ,  Paolo Colpani

IPC: H01L23/522 ,  H01L21/768 ,  H01L23/532

Abstract: An integrated device includes a semiconductor body and a dielectric layer bounded by a surface. A conductive region of a first metal material forms a via region extending into a hole passing through the dielectric layer, and an overlaid redistribution region which extends over the surface. At least one barrier region of a second metal material extends into the hole and surrounds the via region, and the barrier region furthermore extending over the surface. A first coating layer of a third metal material covers the top and the sides of an upper portion of the redistribution region at a distance from the surface. A second coating layer of a fourth metal material extends at a distance from the surface and covers the first coating layer, and covers laterally a lower portion of the redistribution region which is disposed on top of portions of the barrier region extending over the surface.

公开(公告)号：US20190035727A1

公开(公告)日：2019-01-31

申请号：US16044186

申请日：2018-07-24

Applicant: STMicroelectronics S.r.l.

Inventor： Francesco Maria Pipia ,  Ivan Venegoni ,  Annamaria Votta ,  Francesca Milanesi ,  Samuele Sciarrillo ,  Paolo Colpani

IPC: H01L23/522 ,  H01L21/768 ,  H01L23/532

Abstract: An integrated electronic device includes a semiconductor body and a passivation structure including a frontal dielectric layer bounded by a frontal surface. A conductive region forms a via region, extending into a hole through the frontal dielectric layer. An overlaid redistribution region extends over the frontal surface. A barrier structure includes at least a first barrier region extending into the hole and surrounding the via region. The first barrier region extends over the frontal surface. A first coating layer covers the top and the sides of the redistribution region and a second coating layer covers the first coating layer. A cavity extends between the redistribution region and the frontal surface and is bounded on one side by the first coating layer and on the other by the barrier structure.