-
公开(公告)号：US11621051B2
公开(公告)日：2023-04-04
申请号：US17647793
申请日：2022-01-12
Applicant: STMicroelectronics (Rousset) SAS , STMICROELECTRONICS SA
Inventor： Stephane Denorme , Philippe Candelier , Joel Damiens , Fabrice Marinet
Abstract: A device includes a first switch, a first irreversibly programmable memory point, and a second irreversibly programmable memory point coupled in parallel with the first irreversibly programmable memory point. The first switch and the parallel combination of the first and second irreversibly programmable memory points are coupled in series between a first node and a second node.
-
公开(公告)号：US11250930B2
公开(公告)日：2022-02-15
申请号：US16709019
申请日：2019-12-10
Applicant: STMicroelectronics SA , STMicroelectronics (Rousset) SAS
Inventor： Stephane Denorme , Philippe Candelier , Joel Damiens , Fabrice Marinet
Abstract: A device includes a first switch, a first irreversibly programmable memory point, and a second irreversibly programmable memory point coupled in parallel with the first irreversibly programmable memory point. The first switch and the parallel combination of the first and second irreversibly programmable memory points are coupled in series between a first node and a second node.
-
公开(公告)号：US20220139491A1
公开(公告)日：2022-05-05
申请号：US17647793
申请日：2022-01-12
Applicant: STMicroelectronics (Rousset) SAS , STMicroelectronics SA
Inventor： Stephane Denorme , Philippe Candelier , Joel Damiens , Fabrice Marinet
Abstract: A device includes a first switch, a first irreversibly programmable memory point, and a second irreversibly programmable memory point coupled in parallel with the first irreversibly programmable memory point. The first switch and the parallel combination of the first and second irreversibly programmable memory points are coupled in series between a first node and a second node.
-
公开(公告)号：US09564242B2
公开(公告)日：2017-02-07
申请号：US14832802
申请日：2015-08-21
Applicant: STMicroelectronics SA
Inventor： Philippe Candelier , Joel Damiens , Elise Le Roux
IPC: G11C17/16 , G11C17/18 , H01L27/12 , H01L27/112 , H01L27/10
CPC classification number: G11C17/165 , G11C17/18 , H01L27/101 , H01L27/11206
Abstract: A method for controlling the breakdown of an antifuse memory cell formed on a semiconductor substrate, including the steps of: applying a programming voltage; detecting a breakdown time; and interrupting the application of the programming voltage at a time following the breakdown time by a post-breakdown time.
Abstract translation: 一种用于控制形成在半导体衬底上的反熔层存储单元击穿的方法，包括以下步骤：施加编程电压; 检测故障时间; 并且在故障时间之后的故障时间之后中断施加编程电压。
-
公开(公告)号：US20130294142A1
公开(公告)日：2013-11-07
申请号：US13887167
申请日：2013-05-03
Applicant: STMICROELECTRONICS SA
Inventor： Philippe Candelier , Joel Damiens , Elise Leroux
IPC: G11C17/16
CPC classification number: G11C17/165 , G11C17/18 , H01L27/101 , H01L27/11206
Abstract: A method for controlling the breakdown of an antifuse memory cell formed on a semiconductor substrate, including the steps of: applying a programming voltage; detecting a breakdown time; and interrupting the application of the programming voltage at a time following the breakdown time by a post-breakdown time.
-
Patent Agency Ranking
公开(公告)号：US09536622B2
公开(公告)日：2017-01-03
申请号：US14844442
申请日：2015-09-03
Applicant: STMicroelectronics SA
Inventor： Stephane Lacouture , Joel Damiens
CPC classification number: G11C17/18 , G11C5/145 , G11C17/16 , G11C17/165
Abstract: For programming an antifuse memory, the power consumption of the memory is assessed during programming mode. The power consumption is compared with a threshold. When the threshold is exceeded, indicative of successful programming of the antifuse memory cell, the programming mode is terminated.
Abstract translation: 为了编程反熔丝存储器，在编程模式下评估存储器的功耗。 将功耗与阈值进行比较。 当超过阈值时，指示反熔丝存储器单元的成功编程，编程模式被终止。
-
公开(公告)号：US20150364209A1
公开(公告)日：2015-12-17
申请号：US14832802
申请日：2015-08-21
Applicant: STMicroelectronics SA
Inventor： Philippe Candelier , Joel Damiens , Elise Le Roux
IPC: G11C17/16 , H01L27/112 , G11C17/18
CPC classification number: G11C17/165 , G11C17/18 , H01L27/101 , H01L27/11206
Abstract: A method for controlling the breakdown of an antifuse memory cell formed on a semiconductor substrate, including the steps of: applying a programming voltage; detecting a breakdown time; and interrupting the application of the programming voltage at a time following the breakdown time by a post-breakdown time.
Abstract translation: 一种用于控制形成在半导体衬底上的反熔层存储单元击穿的方法，包括以下步骤：施加编程电压; 检测故障时间; 并且在故障时间之后的故障时间之后中断施加编程电压。
-
公开(公告)号：US20160078963A1
公开(公告)日：2016-03-17
申请号：US14844442
申请日：2015-09-03
Applicant: STMicroelectronics SA
Inventor： Stephane Lacouture , Joel Damiens
CPC classification number: G11C17/18 , G11C5/145 , G11C17/16 , G11C17/165
Abstract: For programming an antifuse memory, the power consumption of the memory is assessed during programming mode. The power consumption is compared with a threshold. When the threshold is exceeded, indicative of successful programming of the antifuse memory cell, the programming mode is terminated.
Abstract translation: 为了编程反熔丝存储器，在编程模式下评估存储器的功耗。 将功耗与阈值进行比较。 当超过阈值时，指示反熔丝存储器单元的成功编程，编程模式被终止。
-
公开(公告)号：US09142318B2
公开(公告)日：2015-09-22
申请号：US13887167
申请日：2013-05-03
Applicant: STMicroelectronics SA
Inventor： Philippe Candelier , Joel Damiens , Elise Leroux
IPC: G11C17/16 , G11C17/18 , H01L27/112 , H01L27/10
CPC classification number: G11C17/165 , G11C17/18 , H01L27/101 , H01L27/11206
Abstract: A method for controlling the breakdown of an antifuse memory cell formed on a semiconductor substrate, including the steps of: applying a programming voltage; detecting a breakdown time; and interrupting the application of the programming voltage at a time following the breakdown time by a post-breakdown time.
Abstract translation: 一种用于控制形成在半导体衬底上的反熔层存储单元击穿的方法，包括以下步骤：施加编程电压; 检测故障时间; 并且在故障时间之后的故障时间之后中断施加编程电压。
-
公开(公告)号：US20150085560A1
公开(公告)日：2015-03-26
申请号：US14494383
申请日：2014-09-23
Applicant: STMicroelectronics SA
Inventor： Philippe Candelier , Thérèse Andrée Diokh , Joel Damiens , Elise Le Roux
IPC: G11C13/00
CPC classification number: G11C13/0069 , G11C13/0007 , G11C13/0033 , G11C13/004 , G11C14/009 , G11C2013/0071 , G11C2013/0073 , G11C2013/0083 , G11C2013/009 , G11C2213/79
Abstract: A method of controlling an array of ReRAM cells including programmable-resistance storage elements, including: during a standby period, applying a non-zero standby voltage between electrodes of the storage elements of each cell of the array.
Abstract translation: 一种控制包括可编程电阻存储元件的ReRAM单元阵列的方法，包括：在待机期间，在阵列的每个单元的存储元件的电极之间施加非零备用电压。
-
-
-
-
-
-
-
-
-
Search Results
11
records
(took 0.016 seconds)
