公开(公告)号：US20240321873A1

公开(公告)日：2024-09-26

申请号：US18429611

申请日：2024-02-01

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Doohyun LEE ,  Heonjong SHIN ,  Juneyoung PARK ,  Jaeran JANG

IPC: H01L27/088 ,  H01L21/8234 ,  H01L23/48 ,  H01L23/522

CPC classification number: H01L27/088 ,  H01L21/76895 ,  H01L21/76898 ,  H01L21/823456 ,  H01L21/823475 ,  H01L21/823481 ,  H01L23/481 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/775 ,  H01L29/78696 ,  H01L23/5226

Abstract: An integrated circuit device, including a substrate having a plurality of device regions extending in a first horizontal direction, a plurality of gate electrodes on the plurality of device regions extending in a second horizontal direction that is orthogonal to the first horizontal direction, a plurality of source/drain regions between a pair of gate electrodes adjacent to each other in the first horizontal direction among the plurality of gate electrodes, the plurality of source/drain regions being on portions of the plurality of device regions, a plurality of gate cut regions cutting the plurality of gate electrodes and extending in the first horizontal direction, and a plurality of contact structures including a plurality of contact body portions and a plurality of contact finger portions, the plurality of contact body portions filling the plurality of gate cut regions and extending in the first horizontal direction.

公开(公告)号：US20220149043A1

公开(公告)日：2022-05-12

申请号：US17582357

申请日：2022-01-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Heonjong SHIN ,  Sunghun JUNG ,  Minchan GWAK ,  Yongsik JEONG ,  Sangwon JEE ,  Sora YOU ,  Doohyun LEE

IPC: H01L27/092 ,  H01L29/78 ,  H01L29/66 ,  H01L21/8238 ,  H01L23/522 ,  H01L29/417

Abstract: A semiconductor device may include a substrate including an active pattern extending in a first direction, a gate electrode running across the active pattern and extending in a second direction intersecting the first direction, a source/drain pattern on the active pattern and adjacent to a side of the gate electrode, an active contact in a contact hole exposing the source/drain pattern, an insulating pattern filling a remaining space of the contact hole in which the active contact is provided, a first via on the active contact, and a second via on the gate electrode. The active contact may include a first segment that fills a lower portion of the contact hole and a second segment that vertically protrudes from the first segment. The first via is connected to the second segment. The insulating pattern is adjacent in the first direction to the second via.

公开(公告)号：US20200075595A1

公开(公告)日：2020-03-05

申请号：US16391757

申请日：2019-04-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Heonjong SHIN ,  Sunghun JUNG ,  Minchan GWAK ,  Yongsik JEONG ,  Sangwon JEE ,  Sora YOU ,  Doohyun LEE

IPC: H01L27/092 ,  H01L29/78 ,  H01L29/66 ,  H01L21/8238 ,  H01L23/522 ,  H01L29/417

Abstract: A semiconductor device may include a substrate including an active pattern extending in a first direction, a gate electrode running across the active pattern and extending in a second direction intersecting the first direction, a source/drain pattern on the active pattern and adjacent to a side of the gate electrode, an active contact in a contact hole exposing the source/drain pattern, an insulating pattern filling a remaining space of the contact hole in which the active contact is provided, a first via on the active contact, and a second via on the gate electrode. The active contact may include a first segment that fills a lower portion of the contact hole and a second segment that vertically protrudes from the first segment. The first via is connected to the second segment. The insulating pattern is adjacent in the first direction to the second via.

公开(公告)号：US20240371731A1

公开(公告)日：2024-11-07

申请号：US18507549

申请日：2023-11-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jongmin SHIN ,  Heonjong SHIN ,  June Young PARK ,  Jaeran JANG

IPC: H01L23/48 ,  H01L29/06 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775 ,  H01L29/786

Abstract: A semiconductor device may include a support member, an active region, source and drain regions, and a gate electrode. The support member may include a substrate insulation layer including separating insulators and a power wire disposed at a space between the separating insulators. The active region may be disposed on the power wire. The source and drain regions may be positioned adjacent to the active region. The gate electrode may be disposed on the active region.

公开(公告)号：US20230115743A1

公开(公告)日：2023-04-13

申请号：US17834987

申请日：2022-06-08

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Doohyun LEE ,  Heonjong SHIN ,  Hyunho PARK ,  Minchan GWAK ,  Seon-Bae KIM ,  Jinyoung PARK

IPC: H01L29/786 ,  H01L29/423

Abstract: A semiconductor device may include first and second active regions on a substrate, first and second active patterns on the first and second active regions, first and second source/drain patterns on the first and second active patterns, first and second silicide patterns on the first and second source/drain patterns, and first and second active contacts coupled to the first and second source/drain patterns. A lowermost portion of the first active contact is at a level higher than that of a lowermost portion of the second active contact. A thickness of the first silicide pattern is greater than that of the second silicide pattern.

公开(公告)号：US20230047343A1

公开(公告)日：2023-02-16

申请号：US17734473

申请日：2022-05-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Doohyun LEE ,  Heonjong SHIN ,  Minchan GWAK ,  Seonbae KIM ,  Jinyoung PARK ,  Hyunho PARK

IPC: H01L23/535 ,  H01L23/528 ,  H01L29/06 ,  H01L29/423 ,  H01L29/786 ,  H01L21/02 ,  H01L21/3213 ,  H01L21/768 ,  H01L29/66

Abstract: A semiconductor device includes active regions extending in a first direction on a substrate; a gate electrode intersecting the active regions on the substrate, extending in a second direction, and including a contact region protruding upwardly; and an interconnection line on the gate electrode and connected to the contact region, wherein the contact region includes a lower region having a first width in the second direction and an upper region located on the lower region and having a second width smaller than the first width in the second direction, and wherein at least one side surface of the contact region in the second direction has a point at which an inclination or a curvature is changed between the lower region and the upper region.

公开(公告)号：US20240363536A1

公开(公告)日：2024-10-31

申请号：US18634187

申请日：2024-04-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jinyoung PARK ,  Heonjong SHIN ,  Jaehyun KANG ,  Youngsoo SONG

IPC: H01L23/528 ,  H01L21/768 ,  H01L21/8238 ,  H01L23/48 ,  H01L27/092 ,  H01L29/06 ,  H01L29/417 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775 ,  H01L29/786

CPC classification number: H01L23/5286 ,  H01L21/76898 ,  H01L21/823871 ,  H01L23/481 ,  H01L27/092 ,  H01L29/0673 ,  H01L29/41733 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/775 ,  H01L29/78696

Abstract: A semiconductor device may include a substrate including a first active region including first active patterns spaced apart by a first interval, a second active region including second active patterns spaced apart by a second interval, first and second source/drain regions on the first and second active regions, first and second contact structures connected to the first and second source/drain regions, first and second conductive through-structures connected to the first and second contact structures, a power delivery structure in contact with bottom surfaces of the first and second conductive through-structures, a frontside interconnection structure, and a backside interconnection structure. The first conductive through-structure may be connected to the first source/drain region through the first contact structure. The second conductive through-structure may be connected to the second source/drain region through the frontside interconnection structure. The second interval may be different than the first interval.

公开(公告)号：US20240234502A9

公开(公告)日：2024-07-11

申请号：US18323715

申请日：2023-05-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Junmo PARK ,  Wookhyun KWON ,  Yeonho PARK ,  Jongmin SHIN ,  Heonjong SHIN ,  Jongmin JUN ,  Kyubong CHOI

IPC: H01L29/06 ,  H01L29/24 ,  H01L29/423 ,  H01L29/775 ,  H01L29/786

CPC classification number: H01L29/0673 ,  H01L29/24 ,  H01L29/42364 ,  H01L29/42392 ,  H01L29/775 ,  H01L29/78696

Abstract: A semiconductor device may include a substrate including an active pattern, a channel pattern on the active pattern, a source/drain pattern, a gate electrode, and an insulation pattern. The channel pattern may include semiconductor patterns that are spaced apart from each other and vertically stacked. A lowermost one of the semiconductor patterns may be a first semiconductor pattern. The source/drain pattern may be connected to the semiconductor patterns. The gate electrode may be on the semiconductor patterns and may include a plurality of inner electrodes below the semiconductor patterns except the first semiconductor pattern. The insulation pattern may be between the first semiconductor pattern and the active pattern. The insulation pattern may include a dielectric pattern and a protection layer. The protection layer may be between the dielectric pattern and the first semiconductor pattern. The protection layer may be between the dielectric pattern and the active pattern.

公开(公告)号：US20220406888A1

公开(公告)日：2022-12-22

申请号：US17574074

申请日：2022-01-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Doohyun LEE ,  Heonjong SHIN ,  Seonbae KIM ,  Sungmin KIM ,  Jinyoung PARK ,  Hyunho PARK

IPC: H01L29/06 ,  H01L29/423 ,  H01L29/786

Abstract: A semiconductor device is provided. The semiconductor device includes: an active pattern provided on a substrate having an upper surface; an insulation pattern provided above the substrate and contacting an upper surface of the active pattern; channels spaced apart from each other along a direction perpendicular to the upper surface of the substrate, each of the channels including a material provided in the active pattern; and a gate structure contacting an upper surface of the insulation pattern, an upper surface of the channels, a lower surface of the channels, and sidewalls of the channels opposite to each other. A first distance between an upper surface of the active pattern and a lowermost one of the channels is greater than a second distance between an upper surface of one of the channels and a lower surface of an adjacent channel.

公开(公告)号：US20250081526A1

公开(公告)日：2025-03-06

申请号：US18656949

申请日：2024-05-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jongmin SHIN ,  Woncheol JEONG ,  Heonjong SHIN

IPC: H01L29/417 ,  H01L23/528 ,  H01L29/06 ,  H01L29/08 ,  H01L29/40 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775

Abstract: An integrated circuit device may includes a plurality of device isolation layers extending lengthwise in a first horizontal direction, a plurality of gap-fill insulation layers arranged apart from one another in the first horizontal direction, a plurality of gate structures extending lengthwise in a second horizontal direction perpendicular to the first horizontal direction and on the plurality of gap-fill insulation layers, a first source/drain region and a second source/drain region respectively disposed at both sides of a first gate structure among the plurality of gate structures with respect to the first horizontal direction, an insulation block under the first source/drain region, and an insulation barrier between the first source/drain region and the insulation block. The insulation barrier may cover a lower surface of the first source/drain region.