公开(公告)号：US20210217897A1

公开(公告)日：2021-07-15

申请号：US17004427

申请日：2020-08-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Minhee CHO ,  Hyunmog Park ,  Minwoo Song ,  Woobin Song ,  Hyunsil Oh ,  Minsu Lee

IPC: H01L29/786 ,  H01L27/12

Abstract: A semiconductor device includes: a substrate including an active region and a device isolation region; a flat plate structure formed on the substrate; an oxide semiconductor layer covering a top surface of the flat plate structure and continuously arranged on a top surface of the substrate in the active region and the device isolation region; a gate structure arranged on the oxide semiconductor layer and including a gate dielectric layer and a gate electrode; and a source/drain region arranged on both sides of the gate structure and formed in the oxide semiconductor layer, in which, when viewed from a side cross-section, an extending direction of the flat plate structure and an extending direction of the gate structure cross each other.

公开(公告)号：US10593597B2

公开(公告)日：2020-03-17

申请号：US16185213

申请日：2018-11-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Namgyu Cho ,  Kughwan Kim ,  Geunwoo Kim ,  Jungmin Park ,  Minwoo Song

IPC: H01L21/82 ,  H01L29/40 ,  H01L29/66 ,  H01L21/8234 ,  H01L21/3213

Abstract: A method of fabricating a semiconductor device may include forming a first conductive layer on first to third regions of a substrate, forming a barrier layer on the first conductive layer, the barrier layer including a first barrier layer, a second barrier layer, and a sacrificial layer which are sequentially formed, sequentially forming a second conductive layer and a third conductive layer on the barrier layer, performing a first etching process to remove the third conductive layer from the second region and the third region, the third conductive layer remaining on the first region after the first etching process, and performing a second etching process to remove the second conductive layer and the sacrificial layer from the third region, the second conductive layer and the sacrificial layer remaining on the first region and on the second region after the second etching process.

公开(公告)号：US11594604B2

公开(公告)日：2023-02-28

申请号：US17388269

申请日：2021-07-29

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Namgyu Cho ,  Minwoo Song ,  Ohseong Kwon ,  Wandon Kim ,  Hyeokjun Son ,  Jinkyu Jang

IPC: H01L29/417 ,  H01L29/78 ,  H01L29/786 ,  H01L29/49 ,  H01L29/423 ,  H01L29/06 ,  H01L29/775 ,  H01L29/66

Abstract: A semiconductor device includes: an active fin disposed on a substrate; a gate structure overlapping the active fin; source/drain regions disposed on both sides of the gate structure and on the active fin; and contact structures respectively connected to the source/drain regions, wherein the gate structure includes: a pair of gate spacers spaced apart from each other to provide a trench; a first gate electrode disposed in the trench and extending along an upper surface and a lateral surface of the active fin; a second gate electrode disposed on the first gate electrode in the trench, wherein the first gate electrode is not disposed between the second gate electrode and the pair of gate spacers; and a gate insulating film disposed between the pair of gate spacers and interposed between the first gate electrode and the active fin.

公开(公告)号：US10804158B2

公开(公告)日：2020-10-13

申请号：US16785236

申请日：2020-02-07

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Namgyu Cho ,  Kughwan Kim ,  Geunwoo Kim ,  Jungmin Park ,  Minwoo Song

IPC: H01L21/82 ,  H01L29/40 ,  H01L29/66 ,  H01L21/8234 ,  H01L21/3213

Abstract: A method of fabricating a semiconductor device may include forming a first conductive layer on first to third regions of a substrate, forming a barrier layer on the first conductive layer, the barrier layer including a first barrier layer, a second barrier layer, and a sacrificial layer which are sequentially formed, sequentially forming a second conductive layer and a third conductive layer on the barrier layer, performing a first etching process to remove the third conductive layer from the second region and the third region, the third conductive layer remaining on the first region after the first etching process, and performing a second etching process to remove the second conductive layer and the sacrificial layer from the third region, the second conductive layer and the sacrificial layer remaining on the first region and on the second region after the second etching process.

公开(公告)号：US20200176317A1

公开(公告)日：2020-06-04

申请号：US16785236

申请日：2020-02-07

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Namgyu CHO ,  Kughwan Kim ,  Geunwoo Kim ,  Jungmin Park ,  Minwoo Song

IPC: H01L21/8234 ,  H01L29/40 ,  H01L21/3213 ,  H01L29/66

Abstract: A method of fabricating a semiconductor device may include forming a first conductive layer on first to third regions of a substrate, forming a barrier layer on the first conductive layer, the barrier layer including a first barrier layer, a second barrier layer, and a sacrificial layer which are sequentially formed, sequentially forming a second conductive layer and a third conductive layer on the barrier layer, performing a first etching process to remove the third conductive layer from the second region and the third region, the third conductive layer remaining on the first region after the first etching process, and performing a second etching process to remove the second conductive layer and the sacrificial layer from the third region, the second conductive layer and the sacrificial layer remaining on the first region and on the second region after the second etching process.

公开(公告)号：US10079186B2

公开(公告)日：2018-09-18

申请号：US15273933

申请日：2016-09-23

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sangyub Ie ,  Minwoo Song ,  Jonghan Lee ,  Hyungsuk Jung ,  Hyeri Hong

IPC: H01L23/58 ,  H01L21/66 ,  H01L27/088 ,  H01L29/49 ,  H01L21/8234 ,  H01L29/423 ,  H01L29/66 ,  H01L29/78 ,  H01L29/08

CPC classification number: H01L22/34 ,  H01L21/823418 ,  H01L21/823431 ,  H01L21/823437 ,  H01L21/823462 ,  H01L22/14 ,  H01L27/0886 ,  H01L29/0847 ,  H01L29/42364 ,  H01L29/4966 ,  H01L29/66545 ,  H01L29/7848

Abstract: A method of fabricating a semiconductor device includes forming first and second fin patterns in an active region and in a measurement region of a substrate, respectively, the measurement region being different from the active region, forming first and second gate electrodes to cross the first and second fin patterns, respectively, and measuring a contact potential difference (Vcpd) of the second gate electrode to determine a threshold voltage of the first gate electrode based on the measured contact potential difference (Vcpd).

公开(公告)号：US11955523B2

公开(公告)日：2024-04-09

申请号：US18113116

申请日：2023-02-23

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Namgyu Cho ,  Minwoo Song ,  Ohseong Kwon ,  Wandon Kim ,  Hyeokjun Son ,  Jinkyu Jang

IPC: H01L29/417 ,  H01L21/8234 ,  H01L29/06 ,  H01L29/423 ,  H01L29/49 ,  H01L29/66 ,  H01L29/775 ,  H01L29/78 ,  H01L29/786

CPC classification number: H01L29/41791 ,  H01L21/823431 ,  H01L21/823437 ,  H01L21/823462 ,  H01L21/823468 ,  H01L29/0673 ,  H01L29/41733 ,  H01L29/4236 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/775 ,  H01L29/7854 ,  H01L29/7855 ,  H01L29/78696 ,  H01L29/4966 ,  H01L29/7848

Abstract: A semiconductor device includes: an active fin disposed on a substrate; a gate structure overlapping the active fin; source/drain regions disposed on both sides of the gate structure and on the active fin; and contact structures respectively connected to the source/drain regions, wherein the gate structure includes: a pair of gate spacers spaced apart from each other to provide a trench; a first gate electrode disposed in the trench and extending along an upper surface and a lateral surface of the active fin; a second gate electrode disposed on the first gate electrode in the trench, wherein the first gate electrode is not disposed between the second gate electrode and the pair of gate spacers; and a gate insulating film disposed between the pair of gate spacers and interposed between the first gate electrode and the active fin.

公开(公告)号：US11807231B2

公开(公告)日：2023-11-07

申请号：US16944630

申请日：2020-07-31

Applicant: Samsung Electronics Co., Ltd.

Inventor： Minwoo Song ,  Kyungjin Yoon ,  Chulmin Lee ,  Jaeseung Cho

IPC: B60W30/095 ,  B60W50/16 ,  B60R11/04 ,  G01C21/34 ,  G06F21/32 ,  G06V20/62 ,  G06V20/58 ,  B60W50/00

CPC classification number: B60W30/095 ,  B60R11/04 ,  B60W50/16 ,  G01C21/3415 ,  G06F21/32 ,  G06V20/584 ,  G06V20/62 ,  B60W2050/0075 ,  B60W2556/10 ,  B60W2556/65

Abstract: An electronic device and method are disclosed herein. The electronic device includes communication circuitry, an output interface, memory and a processor. The processor implements the method, including: storing, in the memory, accident modeling information including at least one of a history of accidents at a present location, and a first driver profile of a driver associated with the history of accidents at the present location, receiving at least a portion of a second driver profile from at least one external vehicle proximate to the vehicle via the communication circuitry, the second driver profile indicating driving characteristics of a driver of the at least one external vehicle, generating accident risk information based at least on the accident modeling information and the second driver profile, and outputting the generated accident risk information through the output interface.

公开(公告)号：US09973855B2

公开(公告)日：2018-05-15

申请号：US15181911

申请日：2016-06-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Euichan Jung ,  Minwoo Song ,  Chulhyung Yang ,  Jiwoo Lee

IPC: H04R1/10 ,  H04R5/04 ,  H04R29/00

CPC classification number: H04R5/04 ,  H04R29/001 ,  H04R2420/05

Abstract: An electronic device and a method for controlling output through an external output device are provided. The electronic device includes a housing, a receptacle formed so as to receive one of a first external connector and a second external connector, and a circuit electrically coupled to the receptacle. The first external connector includes first, second, third, and fourth terminals. The second external connector includes first, second, third, and fourth terminals. The circuit is configured to detect whether one of the first and second external connectors is inserted into the receptacle, and, based on results of detection, provide an audio output to the first external connector in a first manner if the first external connector is inserted, and provide the audio output to the second external connector in a second manner different from the first manner if the second external connector is inserted.

公开(公告)号：US12291155B2

公开(公告)日：2025-05-06

申请号：US18174210

申请日：2023-02-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Minwoo Song ,  Chulmin Lee ,  Jaeseung Cho

IPC: B60R16/023 ,  B60W50/04

Abstract: A method of determining a target path according to a source electronic control unit (ECU) mounted on a vehicle is provided. The method includes obtaining state information of a plurality of paths connecting the source ECU with a destination ECU, selecting the target path for target data from among the plurality of paths based on the state information, and transmitting the target data to the destination ECU through an ECU located on the selected target path, the state information including information about at least one of power consumption of an ECU located on the paths, a temperature of the ECU located on the paths, a latency of the paths, and a transmission success rate of the paths.