公开(公告)号：US20140043896A1

公开(公告)日：2014-02-13

申请号：US13939611

申请日：2013-07-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Weon-Ho Park ,  Hyok-Ki Kwon ,  Min-Sup Kim ,  Min-Su Kim ,  Byoung-Ho Kim ,  Eui-Yeol Kim ,  Sang-Hoon Park ,  Ji-Hoon Park ,  Min-Jee Sung ,  Hyo-Soung Sim ,  Chang-Min Jeon ,  Hee-Seog Jeon

IPC: G11C16/34

CPC classification number: G11C16/3431 ,  G11C16/3427

Abstract: A method of preventing program-disturbances for a non-volatile semiconductor memory device having a plurality of memory cells of which each includes a selection transistor and a memory transistor coupled in series between a bit-line and a common source-line is provided. First non-selected memory cells that share a first selection-line with a selected memory cell, and second non-selected memory cells that do not share the first selection-line with the selected memory cell are determined when the selected memory cell is selected to be programmed among the memory cells. A negative voltage is applied to second selection-lines that are coupled to the second non-selected memory cells when the selected memory cell is programmed by applying a positive voltage to the first selection-line that is coupled to the selected memory cell.

Abstract translation: 提供一种防止具有多个存储单元的非易失性半导体存储器件的程序干扰的方法，每个存储单元中的每一个包括选择晶体管和串联耦合在位线和公共源极线之间的存储晶体管。 当选择的存储器单元被选择为为了选择存储单元时，与所选存储单元共享第一选择行的第一非选择存储单元和不与所选存储单元共享第一选择行的第二未选择存储单元 在存储单元之间进行编程。 当所选择的存储单元通过向耦合到所选存储单元的第一选择线施加正电压来编程时，将负电压施加到耦合到第二未选择存储单元的第二选择线。

公开(公告)号：US20140353820A1

公开(公告)日：2014-12-04

申请号：US14199539

申请日：2014-03-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sung-Hun Yu ,  Sang-Hoon Park ,  Jun-Gu Kang ,  Oh-Kyum Kwon ,  Sun-Hyun Kim

IPC: H01L23/00

CPC classification number: H01L24/13 ,  H01L23/3192 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53295 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L2224/0345 ,  H01L2224/03602 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05005 ,  H01L2224/05007 ,  H01L2224/05009 ,  H01L2224/05022 ,  H01L2224/05026 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05184 ,  H01L2224/05186 ,  H01L2224/05541 ,  H01L2224/05572 ,  H01L2224/05644 ,  H01L2224/05666 ,  H01L2224/05684 ,  H01L2224/1134 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/13005 ,  H01L2224/13007 ,  H01L2224/13022 ,  H01L2224/13144 ,  H01L2924/381 ,  H01L2224/05624 ,  H01L2924/00014 ,  H01L2224/05647 ,  H01L2924/04941 ,  H01L2924/00012 ,  H01L2924/207

Abstract: Semiconductor device and method for fabricating the same are provided. The semiconductor device comprises a first metal wiring line, a chip pad which is electrically connected with the first metal wiring line and has a first width, a passivation layer which encloses the chip pad and includes a contact hole, a first barrier pattern formed on a side wall of the contact hole and a top surface of the passivation layer, a contact filling the contact hole on the first barrier pattern, and a bump, which is formed of the same material as the contact, has a second width which is smaller than the first width, and is overlaid with the first metal wiring line and the chip pad, the bump being entirely overlapped with the chip pad.

Abstract translation: 提供半导体装置及其制造方法。 半导体器件包括第一金属布线，与第一金属布线电连接并具有第一宽度的芯片焊盘，封装芯片焊盘并包括接触孔的钝化层，形成在第一金属布线 接触孔的侧壁和钝化层的上表面，填充第一阻挡图案上的接触孔的接触部和由与接触件相同的材料形成的凸块具有小于第二宽度的第二宽度 第一宽度，并且与第一金属布线和芯片焊盘重叠，凸块与芯片焊盘完全重叠。