公开(公告)号：US20190096673A1

公开(公告)日：2019-03-28

申请号：US16052063

申请日：2018-08-01

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： SEUNG-HEON LEE ,  Koung-Min RYU ,  Kyung-Seok OH ,  Sang-Jin HYUN

IPC: H01L21/033 ,  H01L29/66 ,  H01L21/3213 ,  H01L21/67 ,  H01L21/02 ,  H01J37/32 ,  C23C16/50 ,  C23C16/24

Abstract: Disclosed are an apparatus for forming a layer and a method of forming the layer using the same. The apparatus includes a transfer chamber in which a substrate is transferred, a deposition chamber positioned at a side of the transfer chamber and performing a deposition process on the substrate to thereby form the layer on the substrate, and at least a de-hydrogen chamber positioned at another side of the transfer chamber and performing a de-hydrogen process on the layer on the substrate to reduce a hydrogen concentration in the layer. Accordingly, the de-hydrogen process is performed in the apparatus without unloading of the substrate from the apparatus.

公开(公告)号：US20190088798A1

公开(公告)日：2019-03-21

申请号：US16040807

申请日：2018-07-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jae-Jung KIM ,  Dong-Soo LEE ,  Sang-Yong KIM ,  Jin-Kyu JANG ,  Won-Keun CHUNG ,  Sang-Jin HYUN

IPC: H01L29/792 ,  H01L27/092 ,  H01L29/49 ,  H01L29/66 ,  H01L21/8234 ,  H01L21/8238 ,  H01L21/28 ,  H01L29/78

CPC classification number: H01L29/7926 ,  H01L21/28088 ,  H01L21/82345 ,  H01L21/823842 ,  H01L27/0922 ,  H01L29/42392 ,  H01L29/4966 ,  H01L29/66545 ,  H01L29/785 ,  H01L29/78696

Abstract: A semiconductor device includes a first transistor having a first threshold voltage, and including first channels, first source/drain layers connected to opposite sidewalls of the first channels, and a first gate structure surrounding the first channels and including a first gate insulation pattern, a first threshold voltage control pattern, and a first workfunction metal pattern sequentially stacked. The semiconductor device includes a second transistor having a second threshold voltage greater than the first threshold voltage, and including second channels, second source/drain layers connected to opposite sidewalls of the second channels, and a second gate structure surrounding the second channels and including a second gate insulation pattern, a second threshold voltage control pattern, and a second workfunction metal pattern sequentially stacked. A thickness of the second threshold voltage control pattern is equal to or less than a thickness of the first threshold voltage control pattern.

公开(公告)号：US20200020691A1

公开(公告)日：2020-01-16

申请号：US16229207

申请日：2018-12-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Soo-Jung CHOI ,  Dong-Hyun ROH ,  Sung-Soo KIM ,  Gyu-Hwan AHN ,  Sang-Jin HYUN

IPC: H01L27/092 ,  H01L21/8238 ,  H01L29/06 ,  H01L29/66 ,  H01L29/78 ,  H01L29/423 ,  H01L21/308

Abstract: A semiconductor device may include active fins spaced apart from each other by a recess therebetween, each of the active fins protruding from an upper surface of a substrate, an isolation structure including a liner on a lower surface and a sidewall of a lower portion of the recess and a blocking pattern on the liner, the blocking pattern filling a remaining portion of the lower portion of the recess and including a nitride, a carbide or polysilicon, a gate electrode structure on the active fins and the isolation structure, and a source/drain layer on a portion of each of the active fins adjacent to the gate electrode structure.

公开(公告)号：US20210151610A1

公开(公告)日：2021-05-20

申请号：US17134611

申请日：2020-12-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jae-Jung KIM ,  Dong-Soo LEE ,  Sang-Yong KIM ,  Jin-Kyu JANG ,  Won-Keun CHUNG ,  Sang-Jin HYUN

IPC: H01L29/792 ,  H01L27/092 ,  H01L29/49 ,  H01L29/78 ,  H01L21/8234 ,  H01L21/8238 ,  H01L21/28 ,  H01L29/66 ,  H01L29/423 ,  H01L29/06 ,  H01L29/775 ,  H01L29/10 ,  B82Y10/00 ,  H01L29/786 ,  H01L27/088

Abstract: A semiconductor device includes a first transistor having a first threshold voltage, and including first channels, first source/drain layers connected to opposite sidewalls of the first channels, and a first gate structure surrounding the first channels and including a first gate insulation pattern, a first threshold voltage control pattern, and a first workfunction metal pattern sequentially stacked. The semiconductor device includes a second transistor having a second threshold voltage greater than the first threshold voltage, and including second channels, second source/drain layers connected to opposite sidewalls of the second channels, and a second gate structure surrounding the second channels and including a second gate insulation pattern, a second threshold voltage control pattern, and a second workfunction metal pattern sequentially stacked. A thickness of the second threshold voltage control pattern is equal to or less than a thickness of the first threshold voltage control pattern.

公开(公告)号：US20190157410A1

公开(公告)日：2019-05-23

申请号：US16030291

申请日：2018-07-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jeong-Hyuk Yim ,  Wan-Don KIM ,  Jong-Han LEE ,  Hyung-Suk JUNG ,  Sang-Jin HYUN

IPC: H01L29/423 ,  H01L27/088 ,  H01L21/8234

Abstract: A semiconductor device includes a substrate having a first region and a second region, a first transistor formed in the first region and formed by a first gate line including a first lower metal-containing layer and a first upper metal-containing layer, and a second transistor formed in the second region and formed by a second gate line having an equal width to that of the first gate line and including a second lower metal-containing layer and a second upper metal-containing layer on the second upper metal-containing layer, wherein each of an uppermost end of the first upper metal-containing layer and an uppermost end of the second lower metal-containing layer has a higher level than an uppermost end of the first lower metal-containing layer.

公开(公告)号：US20170117190A1

公开(公告)日：2017-04-27

申请号：US15193805

申请日：2016-06-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Won-Keun CHUNG ,  Hu-Yong LEE ,  Taek-Soo JEON ,  Sang-Jin HYUN

IPC: H01L21/8238 ,  H01L29/49 ,  H01L29/66 ,  H01L27/092

CPC classification number: H01L21/823842 ,  H01L27/092 ,  H01L29/4966 ,  H01L29/513 ,  H01L29/66545

Abstract: A semiconductor device includes a first trench and a second trench, a liner pattern along a portion of side surfaces and along bottom surfaces of the first and the second trenches, respectively, a work function metal in the first and the second trenches and on the liner pattern, respectively, a first barrier metal in the first trench and on the work function metal, and having a first thickness, a second barrier metal in the second trench and on the work function metal, and having a second thickness thicker than the first thickness, and a first fill metal on the first barrier metal.

公开(公告)号：US20170077248A1

公开(公告)日：2017-03-16

申请号：US15254297

申请日：2016-09-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Da-Il EOM ,  Jeong-Ik KIM ,  Ja-Hum KU ,  Chul-Sung KIM ,  Jun-Ki PARK ,  Sang-Jin HYUN

IPC: H01L29/417 ,  H01L29/45 ,  H01L29/06 ,  H01L29/78 ,  H01L23/535

CPC classification number: H01L29/41791 ,  H01L21/28518 ,  H01L21/76843 ,  H01L21/76855 ,  H01L21/76856 ,  H01L21/76897 ,  H01L21/823821 ,  H01L21/845 ,  H01L27/0924 ,  H01L27/1211 ,  H01L29/66545 ,  H01L29/7848 ,  H01L29/785

Abstract: A semiconductor device includes an active fin partially protruding from an isolation pattern on a substrate, a gate structure on the active fin, a source/drain layer on a portion of the active fin adjacent to the gate structure, a source/drain layer on a portion of the active fin adjacent to the gate structure, a metal silicide pattern on the source/drain layer, and a plug on the metal silicide pattern. The plug includes a second metal pattern, a metal nitride pattern contacting an upper surface of the metal silicide pattern and covering a bottom and a sidewall of the second metal pattern, and a first metal pattern on the metal silicide pattern, the first metal pattern covering an outer sidewall of the metal nitride pattern. A nitrogen concentration of the first metal pattern gradually decreases according to a distance from the outer sidewall of the metal nitride pattern.

Abstract translation: 半导体器件包括从衬底上的隔离图案部分地突出的有源鳍片，有源鳍片上的栅极结构，与栅极结构相邻的有源鳍片的一部分上的源极/漏极层，在栅极结构上的源极/漏极层 与栅极结构相邻的有源鳍的部分，源极/漏极层上的金属硅化物图案以及金属硅化物图案上的插塞。 塞子包括第二金属图案，接触金属硅化物图案的上表面并覆盖第二金属图案的底部和侧壁的金属氮化物图案，以及金属硅化物图案上的第一金属图案，第一金属图案覆盖 金属氮化物图案的外侧壁。 根据与金属氮化物图案的外侧壁的距离，第一金属图案的氮浓度逐渐降低。

公开(公告)号：US20220352389A1

公开(公告)日：2022-11-03

申请号：US17863127

申请日：2022-07-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jae-Jung KIM ,  Dong-Soo LEE ,  Sang-Yong KIM ,  Jin-Kyu JANG ,  Won-Keun CHUNG ,  Sang-Jin HYUN

IPC: H01L29/792 ,  H01L27/092 ,  H01L29/49 ,  H01L29/78 ,  H01L21/8234 ,  H01L21/8238 ,  H01L21/28 ,  H01L29/66 ,  H01L29/423 ,  H01L29/06 ,  H01L29/775 ,  H01L29/10 ,  B82Y10/00 ,  H01L29/786 ,  H01L27/088

Abstract: A semiconductor device includes a first transistor having a first threshold voltage, and including first channels, first source/drain layers connected to opposite sidewalls of the first channels, and a first gate structure surrounding the first channels and including a first gate insulation pattern, a first threshold voltage control pattern, and a first workfunction metal pattern sequentially stacked. The semiconductor device includes a second transistor having a second threshold voltage greater than the first threshold voltage, and including second channels, second source/drain layers connected to opposite sidewalls of the second channels, and a second gate structure surrounding the second channels and including a second gate insulation pattern, a second threshold voltage control pattern, and a second workfunction metal pattern sequentially stacked. A thickness of the second threshold voltage control pattern is equal to or less than a thickness of the first threshold voltage control pattern.

公开(公告)号：US20200035842A1

公开(公告)日：2020-01-30

申请号：US16532645

申请日：2019-08-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jae-Jung KIM ,  Dong-Soo LEE ,  Sang-Yong KIM ,  Jin-Kyu JANG ,  Won-Keun CHUNG ,  Sang-Jin HYUN

IPC: H01L29/792 ,  H01L29/66 ,  H01L29/423 ,  H01L29/06 ,  H01L29/775 ,  H01L27/092 ,  H01L29/10 ,  B82Y10/00 ,  H01L29/786 ,  H01L27/088 ,  H01L29/49 ,  H01L29/78 ,  H01L21/8234 ,  H01L21/8238 ,  H01L21/28

Abstract: A semiconductor device includes a first transistor having a first threshold voltage, and including first channels, first source/drain layers connected to opposite sidewalls of the first channels, and a first gate structure surrounding the first channels and including a first gate insulation pattern, a first threshold voltage control pattern, and a first workfunction metal pattern sequentially stacked. The semiconductor device includes a second transistor having a second threshold voltage greater than the first threshold voltage, and including second channels, second source/drain layers connected to opposite sidewalls of the second channels, and a second gate structure surrounding the second channels and including a second gate insulation pattern, a second threshold voltage control pattern, and a second workfunction metal pattern sequentially stacked. A thickness of the second threshold voltage control pattern is equal to or less than a thickness of the first threshold voltage control pattern.

公开(公告)号：US20180019314A1

公开(公告)日：2018-01-18

申请号：US15717324

申请日：2017-09-27

Applicant: Samsung Electronics Co ., Ltd .

Inventor： Wan-Don Kim ,  Oh-Seong KWON ,  Hoon-Joo NA ,  Hyeok-Jun SON ,  Jae-Yeol SONG ,  Sung-Kee HAN ,  Sang-Jin HYUN

IPC: H01L29/49 ,  H01L27/088 ,  H01L21/8234 ,  H01L29/423

CPC classification number: H01L29/4966 ,  H01L21/823431 ,  H01L21/82345 ,  H01L21/823462 ,  H01L27/0886 ,  H01L29/42364 ,  H01L29/4238

Abstract: A semiconductor device includes a first transistor comprising a first dielectric film on a substrate and a first work function metal film of a first conductivity type on the first dielectric film, a second transistor comprising a second dielectric film on the substrate and a second work function metal film of the first conductivity type on the second dielectric film, and a third transistor comprising a third dielectric film on the substrate and a third work function metal film of the first conductivity type on the third dielectric film. The first dielectric film comprises a work function tuning material and the second dielectric film does not comprise the work function tuning material. The first work function metal film has different thickness than the third work function metal film. Related methods are also described.