公开(公告)号：US20230068364A1

公开(公告)日：2023-03-02

申请号：US17718924

申请日：2022-04-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kyungin Choi ,  Dongmyoung Kim ,  Haejun Yu ,  Ki-Hyung Ko ,  Jiho Yoo ,  Soonwook Jung

IPC: H01L29/786 ,  H01L27/092 ,  H01L29/06 ,  H01L29/423 ,  H01L21/02 ,  H01L21/8238 ,  H01L29/66

Abstract: A semiconductor device includes an active pattern provided on a substrate, a source/drain pattern provided on the active pattern, a channel pattern configured to be connected to the source/drain pattern, a gate electrode configured to be extended in a first direction and to cross the channel pattern, and a first spacer provided on a side surface of the gate electrode. The first spacer includes a fence portion provided on a side surface of the active pattern and below the source/drain pattern. The source/drain pattern includes a body portion and a neck portion between the body portion and the active pattern. The body portion includes a crystalline surface configured to be slantingly extended from the neck portion. The crystalline surface is configured to be spaced apart from an uppermost portion of the fence portion.

公开(公告)号：US09293336B2

公开(公告)日：2016-03-22

申请号：US14258107

申请日：2014-04-22

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sangryol Yang ,  Soonwook Jung ,  Kyoungseob Kim ,  Youngsub You ,  Byunghong Chung ,  Hanmei Choi

IPC: H01L29/40 ,  H01L21/283 ,  H01L21/768

CPC classification number: H01L21/283 ,  H01L21/76805 ,  H01L29/401

Abstract: A semiconductor device includes a storage node contact on a substrate, and a lower electrode on the storage node contact, a lower sidewall of the lower electrode being covered by a contact residue of a same material as the storage node contact.

Abstract translation: 半导体器件包括在衬底上的存储节点接触和存储节点接触件上的下电极，下电极的下侧壁由与存储节点接触件相同的材料的接触残余物覆盖。

公开(公告)号：US20230059169A1

公开(公告)日：2023-02-23

申请号：US17718795

申请日：2022-04-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jinbum Kim ,  Dongmyoung Kim ,  Cheol Kim ,  Dongsuk Shin ,  Woogwan Shim ,  Seung Hun Lee ,  Soonwook Jung

IPC: H01L29/10 ,  H01L29/08 ,  H01L29/66 ,  H01L21/8234

Abstract: A semiconductor device includes: an active pattern disposed on a substrate; a source/drain pattern disposed on the active pattern; a channel pattern connected to the source/drain pattern, wherein the channel pattern includes semiconductor patterns stacked on each other and spaced apart from each other; and a gate electrode disposed on the channel pattern and extending in a first direction, wherein the gate electrode includes: a channel neighboring part adjacent to a first sidewall of a first semiconductor pattern of the stacked semiconductor patterns; and a body part spaced apart from the first semiconductor pattern, wherein the channel neighboring part is disposed between the body part and the first semiconductor pattern, wherein the first sidewall of the first semiconductor pattern has a first width, wherein the channel neighboring part has a second width less than the first width. The body part has a third width greater than the second width.

公开(公告)号：US10607832B2

公开(公告)日：2020-03-31

申请号：US16164953

申请日：2018-10-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Junyeong Lee ,  Soonwook Jung ,  Bongjin Kuh ,  Pyung Moon ,  Sukjin Chung

IPC: H01L21/00 ,  H01L21/02 ,  H01L21/3205 ,  H01L21/3105 ,  H01L21/306

Abstract: Disclosed are method and apparatus for forming a thin layer. The method for forming the thin layer comprises providing a substrate including patterns, forming a bonding layer on the substrate covering an inner surface of a gap between the patterns, forming a preliminary layer on the bonding layer filling the gap; and thermally treating the preliminary layer to form the thin layer. The bonding layer is a self-assembled monomer layer formed using an organosilane monomer. The preliminary layer is formed from a flowable composition comprising polysilane.