公开(公告)号：US20150058692A1

公开(公告)日：2015-02-26

申请号：US14334947

申请日：2014-07-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： Amir BENNATAN ,  Avner DOR ,  Moshe TWITTO ,  Guy GABSO ,  Yoav SHERESHEVSKI ,  Uri BEITLER ,  Jun-jin KONG ,  Beom-Kyu SHIN

IPC: H03M13/11

CPC classification number: H03M13/1111 ,  G11B2020/185 ,  H03M13/1131 ,  H03M13/1137 ,  H03M13/6566

Abstract: A low-density parity-check (LDPC) decoding method includes exchanging messages between check nodes and variable nodes based on scheduling information representing an order of exchanging messages between the check nodes and the variable nodes for an LDPC decoding, and performing the LDPC decoding based on the exchanged messages, wherein the scheduling information is determined by manipulating at least one of an order of the check nodes and an order of the variable nodes in an LDPC bipartite graph.

Abstract translation: 低密度奇偶校验（LDPC）解码方法包括基于表示在校验节点和可变节点之间交换消息的顺序的调度信息进行LDPC解码的校验节点和可变节点之间的消息交换，并且基于LDPC解码 在所交换的消息上，其中通过在LDPC二分图中操纵校验节点的顺序和可变节点的顺序中的至少一个来确定调度信息。

公开(公告)号：US20230370090A1

公开(公告)日：2023-11-16

申请号：US18358660

申请日：2023-07-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Ariel DOUBCHAK ,  Avner DOR ,  Yaron SHANY ,  Tal PHILOSOF ,  Yoav SHERESHEVSKI ,  Amit BERMAN

IPC: H03M13/11 ,  H03M13/00

CPC classification number: H03M13/1174 ,  H03M13/1108 ,  H03M13/616

Abstract: A method of correcting data stored in a memory device includes: applying an iterative decoder to the data; determining a total number of rows in first data the decoder attempted to correct; estimating first visible error rows among the total number that continue to have an error after the attempt; estimating residual error rows among the total number that no longer have an error after the attempt; determining second visible error rows in second data of the decoder that continue to have an error by permuting indices of the residual error rows according to a permutation; and correcting the first data using the first visible error rows.

公开(公告)号：US20170139769A1

公开(公告)日：2017-05-18

申请号：US14941051

申请日：2015-11-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Evgeny BLAICHMAN ,  Moshe TWITTO ,  Avner DOR ,  Elona EREZ ,  Jun Jin KONG ,  Shay LANDIS ,  Yaron SHANY ,  Yoav SHERESHEVSKI

IPC: G06F11/10 ,  G11C29/52 ,  H03M13/15 ,  G06F3/06

CPC classification number: G06F11/1068 ,  G06F3/0619 ,  G06F3/064 ,  G06F3/0653 ,  G06F3/0679 ,  G11C29/52 ,  G11C2029/0409 ,  G11C2029/0411 ,  H03M13/09 ,  H03M13/098 ,  H03M13/1102 ,  H03M13/1515 ,  H03M13/152 ,  H03M13/23 ,  H03M13/2906 ,  H03M13/2909 ,  H03M13/2927 ,  H03M13/2948 ,  H03M13/2957 ,  H03M13/3707 ,  H03M13/455

Abstract: A memory system includes a memory controller; and a memory device, the memory device including a memory cell array, the memory cell array including least a first memory page having a plurality of memory cells storing a plurality of stored bits, the memory controller being such that, the memory controller performs a first hard read operation on the first memory page to generate a plurality of read bits corresponding to the plurality of stored bits, and if the memory controller determines to change a value of one of a first group of bits, from among the plurality of read bits, the memory controller selects one of the first group of bits based on log likelihood ratio (LLR) values corresponding, respectively, to each of the first group of bits, and changes the value of the selected bit.