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公开(公告)号：US10908842B2
公开(公告)日：2021-02-02
申请号：US16422599
申请日：2019-05-24
Applicant: Samsung Electronics Co., Ltd.
Inventor： Eun Chu Oh , Younggeun Lee , Youngjin Cho , Jin-Hyeok Choi
Abstract: A storage device includes a nonvolatile memory including a plurality of nonvolatile memory cells, a write buffer memory storing first data and second data received from a host, and a storage controller storing the first data and the second data that are stored in the write buffer memory into the nonvolatile memory. The storage controller performs a first program operation and a second program operation on a plurality of first memory cells connected to a first word line group to store the first data, and performs a first program operation and a second program operation on a plurality of second memory cells connected to a second word line group to store the second data. While the storage controller performs the first program operation on the plurality of second memory cells, the first data is written in the write buffer memory.
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公开(公告)号：US11669393B2
公开(公告)日：2023-06-06
申请号：US17495632
申请日：2021-10-06
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Jeongho Lee , Youngsik Kim , Seungyou Baek , Youngkwang Yoo , Younggeun Lee , Yena Lee
CPC classification number: G06F11/1044 , G06F9/30029 , G06F9/544 , G06F11/3037 , G06F12/0246 , G11C13/0004 , G11C13/004 , G11C13/0069
Abstract: An operating method of a memory device, which includes a first memory region and a second memory region, includes reading first data from the first memory region and storing the read first data in a data buffer block, performing a first XOR operation on the first data provided from the data buffer block and second data read from the second memory region to generate first result data, writing the first data stored in the data buffer block in the second memory region, performing a second XOR operation on the first data and the first result data to generate the second data, storing the generated second data in the data buffer block, and writing the second data stored in the data buffer block in the first memory region.
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3.发明授权公开(公告)号：US11537471B2
公开(公告)日：2022-12-27
申请号：US17469377
申请日：2021-09-08
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Jeongho Lee , Youngsik Kim , Seungyou Baek , Eunchu Oh , Youngkwang Yoo , Younggeun Lee
Abstract: A memory controller for controlling a memory operation of a memory device includes: an error correction code (ECC) circuit configured to detect an error of first read data read from the memory device and correct the error; an error type detection logic configured to write first write data to the memory device, compare second read data with the first write data, detect an error bit of the second read data based on a result of the comparing, and output information about an error type identified by the error bit; and a data patterning logic configured to change a bit pattern of input data to reduce an error of the second read data based on the information about the error type.
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4.发明授权公开(公告)号：US11507460B2
公开(公告)日：2022-11-22
申请号：US17448995
申请日：2021-09-27
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Jeongho Lee , Youngsik Kim , Seungyou Baek , Eunchu Oh , Youngkwang Yoo , Younggeun Lee
Abstract: A memory controller for controlling a memory operation of a memory device includes: an error correction code (ECC) circuit configured to detect an error of first read data read from the memory device and correct the error; an error type detection logic configured to write first write data to the memory device, compare second read data with the first write data, detect an error bit of the second read data based on a result of the comparing, and output information about an error type identified by the error bit; and a data patterning logic configured to change a bit pattern of input data to reduce an error of the second read data based on the information about the error type.
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公开(公告)号：US11163638B2
公开(公告)日：2021-11-02
申请号：US16695395
申请日：2019-11-26
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Jeongho Lee , Youngsik Kim , Seungyou Baek , Youngkwang Yoo , Younggeun Lee , Yena Lee
Abstract: An operating method of a memory device, which includes a first memory region and a second memory region, includes reading first data from the first memory region and storing the read first data in a data buffer block, performing a first XOR operation on the first data provided from the data buffer block and second data read from the second memory region to generate first result data, writing the first data stored in the data buffer block in the second memory region, performing a second XOR operation on the first data and the first result data to generate the second data, storing the generated second data in the data buffer block, and writing the second data stored in the data buffer block in the first memory region.
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Patent Agency Ranking
6.发明授权公开(公告)号：US11847024B2
公开(公告)日：2023-12-19
申请号：US17972804
申请日：2022-10-25
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Jeongho Lee , Youngsik Kim , Seungyou Baek , Eunchu Oh , Youngkwang Yoo , Younggeun Lee
CPC classification number: G06F11/1076 , G06F3/0619 , G06F3/0653 , G06F3/0659 , G06F3/0679
Abstract: A memory controller for controlling a memory operation of a memory device includes: an error correction code (ECC) circuit configured to detect an error of first read data read from the memory device and correct the error; an error type detection logic configured to write first write data to the memory device, compare second read data with the first write data, detect an error bit of the second read data based on a result of the comparing, and output information about an error type identified by the error bit; and a data patterning logic configured to change a bit pattern of input data to reduce an error of the second read data based on the information about the error type.
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7.发明授权公开(公告)号：US11144393B2
公开(公告)日：2021-10-12
申请号：US16840581
申请日：2020-04-06
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Jeongho Lee , Youngsik Kim , Seungyou Baek , Eunchu Oh , Youngkwang Yoo , Younggeun Lee
Abstract: A memory controller for controlling a memory operation of a memory device includes: an error correction code (ECC) circuit configured to detect an error of first read data read from the memory device and correct the error; an error type detection logic configured to write first write data to the memory device, compare second read data with the first write data, detect an error bit of the second read data based on a result of the comparing, and output information about an error type identified by the error bit; and a data patterning logic configured to change a bit pattern of input data to reduce an error of the second read data based on the information about the error type.
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公开(公告)号：US10789019B2
公开(公告)日：2020-09-29
申请号：US15855840
申请日：2017-12-27
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Youngsik Kim , Jinwoo Kim , Hee Hyun Nam , Kyungbo Yang , Ji-Seung Youn , Younggeun Lee
Abstract: A storage device includes a nonvolatile memory and a controller. The controller includes a job manager circuit and a processor. The job manager circuit manages a first-type job associated with the nonvolatile memory, and the processor processes a second-type job associated with the nonvolatile memory. The job manager circuit manages the first-type job without intervention of the processor. The processor provides a management command to the job manager circuit in response to a notification received from the job manager circuit, such that the second-type job is processed.
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公开(公告)号：US09799402B2
公开(公告)日：2017-10-24
申请号：US15083834
申请日：2016-03-29
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Jinwoo Kim , Seong Yeon Kim , Jaegeun Park , Hyo-Deok Shin , Younggeun Lee , Youngjin Cho
CPC classification number: G11C16/10 , G11C7/1063
Abstract: A nonvolatile memory system includes first and second nonvolatile memory devices and a memory controller configured to control the first and second nonvolatile memory devices through one channel. During a program operation, the memory controller transmits first signals, for setting first page data up in the first nonvolatile memory device, to the first nonvolatile memory device through the channel. While the first nonvolatile memory device sets up the first page data in response to the first signals, the memory controller transmits second signals, for setting second page data up in the second nonvolatile memory device, to the second nonvolatile memory device.
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公开(公告)号：US09142317B2
公开(公告)日：2015-09-22
申请号：US14231856
申请日：2014-04-01
Applicant: Samsung Electronics Co., Ltd.
Inventor： Younggeun Lee , Youngjin Cho , Hyun-Wook Lee , Junghyo Woo
CPC classification number: G11C17/16 , G06F12/06 , G06F13/1668 , G06F13/1694 , G11C11/005 , G11C17/00 , G11C29/822 , G11C29/846
Abstract: An embedded memory device includes a mask ROM including a plurality of mask ROM cells and an address decoder configured to decode an address of the plurality of mask ROM cells; and an e-fuse memory configured to replace a part of data stored in the mask ROM with replacement data, the e-fuse memory including, a plurality of e-fuse memory cells configured to store the replacement data, and an e-fuse address selector configured to decode an address of the plurality of e-fuse memory cells and to selectively cause data of one or more of the plurality of e-fuse memory cells to be output based on the decoding result.
Abstract translation: 一种嵌入式存储器件包括：掩模ROM，包括多个掩模ROM单元;以及地址解码器，被配置为对多个掩模ROM单元的地址进行解码; 以及电子熔丝存储器，其被配置为用替换数据替换存储在掩模ROM中的一部分数据，所述电子熔丝存储器包括被配置为存储替换数据的多个电子熔丝存储器单元和电子熔丝地址 所述选择器被配置为解码所述多个电子熔丝存储单元的地址，并且基于所述解码结果选择性地引起所述多个电子熔丝存储器单元中的一个或多个的数据的输出。
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