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公开(公告)号：US11175841B2
公开(公告)日：2021-11-16
申请号：US16735709
申请日：2020-01-07
Applicant: Silicon Motion, Inc.
Inventor： Jian-Dong Du , Chia-Jung Hsiao , Tsung-Chieh Yang
Abstract: A method for use in management of a flash memory module is provided. The flash memory module has a plurality of blocks, wherein a portion of the blocks belong to a spare pool. The method includes: preserving at least one erased block in the spare pool for a write operation; monitoring an erasing period regarding the at least one erased block; and performing a replacement operation to replace the at least one erased block when the erase time exceeds a threshold.
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公开(公告)号：US11030042B2
公开(公告)日：2021-06-08
申请号：US16841688
申请日：2020-04-07
Applicant: Silicon Motion, Inc.
Inventor： Tsung-Chieh Yang , Hong-Jung Hsu , Jian-Dong Du
Abstract: A flash memory method includes: classifying data into a plurality of groups of data; respectively executing error code encoding to generate first corresponding parity check code to store the groups of data and first corresponding parity check code into flash memory module as first blocks; reading out the groups of data from first blocks; executing error correction and de-randomize operation upon read out data to generate de-randomized data; executing randomize operation upon de-randomized data according to a set of seeds to generate randomized data; performing error code encoding upon randomized data to generate second corresponding parity check code; and, storing randomized data and second corresponding parity check code into flash memory module as second block; a cell of first block is used for storing data of first bit number which is different from second bit number corresponding to a cell of second block.
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3.发明申请公开(公告)号：US20200242026A1
公开(公告)日：2020-07-30
申请号：US16686214
申请日：2019-11-18
Applicant: Silicon Motion, Inc.
Inventor： Jian-Dong Du , Pi-Ju Tsai , Tsung-Chieh Yang
IPC: G06F12/02 , G06F12/0882 , G06F12/0891 , G06F13/16 , G06F3/06 , G06F11/07
Abstract: The present invention provides a method for managing a flash memory module, wherein the flash memory module includes a plurality of flash memory chips, each flash memory chip includes a plurality of blocks, and each block includes a plurality of pages, and the method includes the steps of: using a time management circuit to generate current time information; when data is written into any one of the blocks, recording the time information generated by the time management circuit; and determining at least one specific block according to quantity of invalid pages within each block and the time information of each block.
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4.发明申请公开(公告)号：US20200242025A1
公开(公告)日：2020-07-30
申请号：US16683211
申请日：2019-11-13
Applicant: Silicon Motion, Inc.
Inventor： Jian-Dong Du , Chia-Jung Hsiao , Pi-Ju Tsai
IPC: G06F12/02 , G06F12/0882 , G06F13/16 , G06F11/07 , G11C7/22 , G11C11/4074
Abstract: The present invention provides a flash memory controller, wherein the flash memory controller is arranged to access a flash memory module, and the flash memory controller includes a ROM, a microprocessor and a time-management circuit. The ROM stores a program code, the microprocessor is configured to execute the program code to control the access of the flash memory module, and the time-management circuit is configured to generate current time information. In the operations of the flash memory controller, when the microprocessor writes data into last pages of a specific block of the flash memory module, the microprocessor writes the time information generated by the time-management circuit into one of the last pages of the specific block.
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公开(公告)号：US10025662B2
公开(公告)日：2018-07-17
申请号：US15876211
申请日：2018-01-22
Applicant: Silicon Motion Inc.
Inventor： Tsung-Chieh Yang , Hong-Jung Hsu , Jian-Dong Du
CPC classification number: G06F11/1068 , G06F11/1072 , G06F11/1076 , G11C11/5621 , G11C11/5628 , G11C16/0483 , G11C16/10 , G11C16/26 , G11C16/32 , G11C16/3418 , G11C29/52
Abstract: A method used in a flash memory module having a plurality of storage blocks is disclosed. Each storage block can be used as a first block or a second block wherein a cell of the first block is arranged for storing data of 1 bit and a cell of the second block is arranged for storing data of at least 2 bits. The method includes: classifying data to be programmed into a plurality of groups of data; executing error code encoding to generate a corresponding parity check code to store the groups of data and the corresponding parity check code to at least one block of first blocks; and after completing storing the groups of data, performing an internal copy operation upon the groups of data and the corresponding parity check code from the at least one block of the first blocks to at least one second block.
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Patent Agency Ranking
公开(公告)号：US11847023B2
公开(公告)日：2023-12-19
申请号：US17963999
申请日：2022-10-11
Applicant: Silicon Motion, Inc.
Inventor： Tsung-Chieh Yang , Hong-Jung Hsu , Jian-Dong Du
CPC classification number: G06F11/1068 , G06F11/1072 , G06F11/1076 , G11C11/5621 , G11C11/5628 , G11C11/5642 , G11C16/10 , G11C16/26 , G11C29/52 , G11C16/0483 , G11C2211/5641
Abstract: A flash memory method includes: classifying data into a plurality of groups of data; respectively executing error code encoding to generate first corresponding parity check code to store the groups of data and first corresponding parity check code into flash memory module as first blocks; reading out the groups of data from first blocks; executing error correction and de-randomize operation upon read out data to generate de-randomized data; executing randomize operation upon de-randomized data according to a set of seeds to generate randomized data; performing error code encoding upon randomized data to generate second corresponding parity check code; and, storing randomized data and second corresponding parity check code into flash memory module as second block; a cell of first block is used for storing data of first bit number which is different from second bit number corresponding to a cell of second block.
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公开(公告)号：US11487655B2
公开(公告)日：2022-11-01
申请号：US17355192
申请日：2021-06-23
Applicant: Silicon Motion, Inc.
Inventor： Jian-Dong Du , Chia-Jung Hsiao , Tsung-Chieh Yang
IPC: G06F12/02 , G11C11/4093 , G06F12/0882 , G11C11/4099 , G11C11/4074 , G06F13/16
Abstract: The present invention provides a flash memory controller, wherein the flash memory controller is arranged to access a flash memory module, and the flash memory controller includes a ROM, a microprocessor and a timer. The ROM stores a program code, the microprocessor is configured to execute the program code to control the access of the flash memory module, and the timer is used to generate time information. In the operations of the flash memory controller, the microprocessor refers to the time information to perform dummy read operations upon at least a portion of the blocks, wherein the dummy read operations are not triggered by read commands from a host device.
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8.发明授权公开(公告)号：US11210209B2
公开(公告)日：2021-12-28
申请号：US16686214
申请日：2019-11-18
Applicant: Silicon Motion, Inc.
Inventor： Jian-Dong Du , Pi-Ju Tsai , Tsung-Chieh Yang
IPC: G06F12/02 , G06F12/0882 , G06F3/06 , G06F13/16 , G06F12/0891 , G06F11/07
Abstract: The present invention provides a method for managing a flash memory module, wherein the flash memory module includes a plurality of flash memory chips, each flash memory chip includes a plurality of blocks, and each block includes a plurality of pages, and the method includes the steps of: using a time management circuit to generate current time information; when data is written into any one of the blocks, recording the time information generated by the time management circuit; and determining at least one specific block according to quantity of invalid pages within each block and the time information of each block.
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公开(公告)号：US11074174B2
公开(公告)日：2021-07-27
申请号：US16683191
申请日：2019-11-13
Applicant: Silicon Motion, Inc.
Inventor： Jian-Dong Du , Chia-Jung Hsiao , Tsung-Chieh Yang
IPC: G11C11/4093 , G11C11/4074 , G06F12/02 , G06F12/0882 , G11C11/4099 , G06F13/16
Abstract: The present invention provides a flash memory controller, wherein the flash memory controller is arranged to access a flash memory module, and the flash memory controller includes a ROM, a microprocessor and a timer. The ROM stores a program code, the microprocessor is configured to execute the program code to control the access of the flash memory module, and the timer is used to generate time information. In the operations of the flash memory controller, the microprocessor refers to the time information to perform dummy read operations upon at least a portion of the blocks, wherein the dummy read operations are not triggered by read commands from a host device.
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公开(公告)号：US10713115B2
公开(公告)日：2020-07-14
申请号：US16184925
申请日：2018-11-08
Applicant: Silicon Motion Inc.
Inventor： Tsung-Chieh Yang , Hong-Jung Hsu , Jian-Dong Du
Abstract: A flash memory method includes: classifying data into a plurality of groups of data; respectively executing error code encoding to generate first corresponding parity check code to store the groups of data and first corresponding parity check code into flash memory module as first blocks; reading out the groups of data from first blocks; executing error correction and de-randomize operation upon read out data to generate de-randomized data; executing randomize operation upon de-randomized data according to a set of seeds to generate randomized data; performing error code encoding upon randomized data to generate second corresponding parity check code; and, storing randomized data and second corresponding parity check code into flash memory module as second block; a cell of first block is used for storing data of first bit number which is different from second bit number corresponding to a cell of second block.
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