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1.
公开(公告)号:US20160148883A1
公开(公告)日:2016-05-26
申请号:US15010022
申请日:2016-01-29
Applicant: Texas Instruments Incorporated
Inventor: Brian Zinn
IPC: H01L23/00
CPC classification number: H01L24/05 , H01L21/76847 , H01L23/3114 , H01L23/3192 , H01L23/5283 , H01L23/53223 , H01L23/53238 , H01L23/53295 , H01L24/03 , H01L24/06 , H01L2224/02181 , H01L2224/02185 , H01L2224/0219 , H01L2224/0345 , H01L2224/03616 , H01L2224/0382 , H01L2224/0391 , H01L2224/04042 , H01L2224/05007 , H01L2224/05026 , H01L2224/05124 , H01L2224/05155 , H01L2224/05166 , H01L2224/05186 , H01L2224/05558 , H01L2224/05562 , H01L2224/0557 , H01L2224/05571 , H01L2224/05573 , H01L2224/05582 , H01L2224/05676 , H01L2924/01028 , H01L2924/01044 , H01L2924/13055 , H01L2924/30101 , H01L2924/00 , H01L2924/00012 , H01L2924/00014 , H01L2924/04953 , H01L2924/04941
Abstract: A method of forming bond pads includes providing a substrate including an integrated circuit (IC) device formed thereon having an oxidizable uppermost metal interconnect layer which provides a plurality of bond pads that are coupled to circuit nodes on the IC device. The plurality of bond pads include a metal bond pad area. At least one passivation layer provides a trench including dielectric sidewalls above the metal bond pad area. A ruthenium (Ru) layer is deposited directly on the dielectric sidewalls and directly on the metal bond pad area, which removes the need for a barrier layer lining the dielectric sidewalls of the trench. The Ru layer is patterned to provide a bond pad surface for the plurality of bond pads.
Abstract translation: 形成接合焊盘的方法包括提供包括形成在其上的集成电路(IC)器件的衬底,其具有可氧化的最上面的金属互连层,其提供耦合到IC器件上的电路节点的多个接合焊盘。 多个接合焊盘包括金属焊盘区域。 至少一个钝化层提供包括金属接合焊盘区域上方的电介质侧壁的沟槽。 钌(Ru)层直接沉积在电介质侧壁上,直接沉积在金属焊盘区域上,这消除了对沟槽电介质侧壁衬垫的阻挡层的需要。 图案化Ru层以为多个接合焊盘提供接合焊盘表面。
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公开(公告)号:US20190341181A1
公开(公告)日:2019-11-07
申请号:US16512642
申请日:2019-07-16
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Fuchao Wang , Yousong Zhang , Neal Thomas Murphy , Brian Zinn , Jonathan P. Davis
Abstract: An integrated magnetic device has a magnetic core which includes layers of the magnetic material located in a trench in a dielectric layer. The magnetic material layers are flat and parallel to a bottom of the trench, and do not extend upward along sides of the trench. The integrated magnetic device is formed by forming layers of the magnetic material over the dielectric layer and extending into the trench. A protective layer is formed over the magnetic material layers. The magnetic material layers are removed from over the dielectric layer, leaving the magnetic material layers and a portion of the protective layer in the trench. The magnetic material layers along sides of the trench are subsequently removed. The magnetic material layers along the bottom of the trench provide the magnetic core.
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公开(公告)号:US11443879B2
公开(公告)日:2022-09-13
申请号:US16512642
申请日:2019-07-16
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Fuchao Wang , Yousong Zhang , Neal Thomas Murphy , Brian Zinn , Jonathan P. Davis
Abstract: An integrated magnetic device has a magnetic core which includes layers of the magnetic material located in a trench in a dielectric layer. The magnetic material layers are flat and parallel to a bottom of the trench, and do not extend upward along sides of the trench. The integrated magnetic device is formed by forming layers of the magnetic material over the dielectric layer and extending into the trench. A protective layer is formed over the magnetic material layers. The magnetic material layers are removed from over the dielectric layer, leaving the magnetic material layers and a portion of the protective layer in the trench. The magnetic material layers along sides of the trench are subsequently removed. The magnetic material layers along the bottom of the trench provide the magnetic core.
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公开(公告)号:US20180358163A1
公开(公告)日:2018-12-13
申请号:US15618353
申请日:2017-06-09
Applicant: Texas Instruments Incorporated
Inventor: Fuchao Wang , Yousong Zhang , Neal Thomas Murphy , Brian Zinn , Jonathan P. Davis
IPC: H01F27/245 , H01F41/02 , H01F1/147
CPC classification number: H01F10/30 , H01F17/0033 , H01F41/046
Abstract: An integrated magnetic device has a magnetic core which includes layers of the magnetic material located in a trench in a dielectric layer. The magnetic material layers are flat and parallel to a bottom of the trench, and do not extend upward along sides of the trench. The integrated magnetic device is formed by forming layers of the magnetic material over the dielectric layer and extending into the trench. A protective layer is formed over the magnetic material layers. The magnetic material layers are removed from over the dielectric layer, leaving the magnetic material layers and a portion of the protective layer in the trench. The magnetic material layers along sides of the trench are subsequently removed. The magnetic material layers along the bottom of the trench provide the magnetic core.
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公开(公告)号:US10403424B2
公开(公告)日:2019-09-03
申请号:US15618353
申请日:2017-06-09
Applicant: Texas Instruments Incorporated
Inventor: Fuchao Wang , Yousong Zhang , Neal Thomas Murphy , Brian Zinn , Jonathan P. Davis
Abstract: An integrated magnetic device has a magnetic core which includes layers of the magnetic material located in a trench in a dielectric layer. The magnetic material layers are flat and parallel to a bottom of the trench, and do not extend upward along sides of the trench. The integrated magnetic device is formed by forming layers of the magnetic material over the dielectric layer and extending into the trench. A protective layer is formed over the magnetic material layers. The magnetic material layers are removed from over the dielectric layer, leaving the magnetic material layers and a portion of the protective layer in the trench. The magnetic material layers along sides of the trench are subsequently removed. The magnetic material layers along the bottom of the trench provide the magnetic core.
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6.
公开(公告)号:US09281275B2
公开(公告)日:2016-03-08
申请号:US14278613
申请日:2014-05-15
Applicant: Texas Instruments Incorporated
Inventor: Brian Zinn
IPC: H01L21/311 , H01L23/532 , H01L23/00 , H01L21/768
CPC classification number: H01L24/05 , H01L21/76847 , H01L23/3114 , H01L23/3192 , H01L23/5283 , H01L23/53223 , H01L23/53238 , H01L23/53295 , H01L24/03 , H01L24/06 , H01L2224/02181 , H01L2224/02185 , H01L2224/0219 , H01L2224/0345 , H01L2224/03616 , H01L2224/0382 , H01L2224/0391 , H01L2224/04042 , H01L2224/05007 , H01L2224/05026 , H01L2224/05558 , H01L2224/05562 , H01L2224/0557 , H01L2224/05571 , H01L2224/05573 , H01L2224/05582 , H01L2224/05676 , H01L2924/01028 , H01L2924/01044 , H01L2924/13055 , H01L2924/30101 , H01L2924/00 , H01L2924/00012 , H01L2924/00014
Abstract: A method of forming bond pads includes providing a substrate including an integrated circuit (IC) device formed thereon having an oxidizable uppermost metal interconnect layer which provides a plurality of bond pads that are coupled to circuit nodes on the IC device. The plurality of bond pads include a metal bond pad area. At least one passivation layer provides a trench including dielectric sidewalls above the metal bond pad area. A ruthenium (Ru) layer is deposited directly on the dielectric sidewalls and directly on the metal bond pad area, which removes the need for a barrier layer lining the dielectric sidewalls of the trench. The Ru layer is patterned to provide a bond pad surface for the plurality of bond pads.
Abstract translation: 形成接合焊盘的方法包括提供包括形成在其上的集成电路(IC)器件的衬底,其具有可氧化的最上面的金属互连层,其提供耦合到IC器件上的电路节点的多个接合焊盘。 多个接合焊盘包括金属焊盘区域。 至少一个钝化层提供包括金属接合焊盘区域上方的电介质侧壁的沟槽。 钌(Ru)层直接沉积在电介质侧壁上,直接沉积在金属焊盘区域上,这消除了对沟槽电介质侧壁衬垫的阻挡层的需要。 图案化Ru层以为多个接合焊盘提供接合焊盘表面。
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