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1.发明授权Ohmic metal contact and channel protection in GaN devices using an encapsulation layer 有权使用封装层的GaN器件中的欧姆金属接触和沟道保护公开(公告)号：US06884704B2
公开(公告)日：2005-04-26
申请号：US10634348
申请日：2003-08-04
IPC分类号： H01L21/24 , H01L21/285 , H01L21/335 , H01L21/337 , H01L29/20 , H01L29/45 , H01L21/48 , H01L21/38
CPC分类号： H01L29/66462 , H01L21/24 , H01L21/242 , H01L21/28587 , H01L29/2003 , H01L29/452 , H01L29/66924
摘要： A method for fabricating a semiconductor device which protects the ohmic metal contacts and the channel of the device during subsequent high temperature processing steps is explained. An encapsulation layer is used to cover the channel and ohmic metal contacts. The present invention provides a substrate on which a plurality of semiconductor layers are deposited. The semiconductor layers act as the channel of the device. The semiconductor layers are covered with an encapsulation layer. A portion of the encapsulation layer and the plurality of semiconductor layers are removed, wherein ohmic metal contacts are deposited. The ohmic metal contacts are then annealed to help reduce their resistance. The encapsulation layer ensures that the ohmic metal contacts do not migrate during the annealing step and that the channel is not harmed by the high temperatures needed during the annealing step.
摘要翻译： 说明了在随后的高温处理步骤中制造保护欧姆金属触点和器件通道的半导体器件的方法。 封装层用于覆盖通道和欧姆金属触点。 本发明提供一种其上沉积有多个半导体层的衬底。 半导体层用作器件的通道。 半导体层被封装层覆盖。 去除封装层和多个半导体层的一部分，其中沉积欧姆金属接触。 然后将欧姆金属触点退火以帮助降低其电阻。 封装层确保在退火步骤期间欧姆金属触点不迁移，并且该通道不会受退火步骤期间所需的高温的损害。
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公开(公告)号：US08030688B2
公开(公告)日：2011-10-04
申请号：US12486686
申请日：2009-06-17
IPC分类号： H01L29/778
CPC分类号： H01L29/66462 , H01L21/24 , H01L21/242 , H01L21/28587 , H01L29/2003 , H01L29/452 , H01L29/66924
摘要： A method for fabricating a semiconductor device which protects the ohmic metal contacts and the channel of the device during subsequent high temperature processing steps is explained. An encapsulation layer is used to cover the channel and ohmic metal contacts. The present invention provides a substrate on which a plurality of semiconductor layers are deposited. The semiconductor layers act as the channel of the device. The semiconductor layers are covered with an encapsulation layer. A portion of the encapsulation layer and the plurality of semiconductor layers are removed, wherein ohmic metal contacts are deposited. The ohmic metal contacts are then annealed to help reduce their resistance. The encapsulation layer ensures that the ohmic metal contacts do not migrate during the annealing step and that the channel is not harmed by the high temperatures needed during the annealing step.
摘要翻译： 说明了在随后的高温处理步骤中制造保护欧姆金属触点和器件通道的半导体器件的方法。 封装层用于覆盖通道和欧姆金属触点。 本发明提供一种其上沉积有多个半导体层的衬底。 半导体层用作器件的通道。 半导体层被封装层覆盖。 去除封装层和多个半导体层的一部分，其中沉积欧姆金属接触。 然后将欧姆金属触点退火以帮助降低它们的电阻。 封装层确保在退火步骤期间欧姆金属接触不迁移，并且该通道不会受退火步骤期间所需的高温的损害。
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3.发明授权Ohmic metal contact and channel protection in GaN devices using an encapsulation layer 有权使用封装层的GaN器件中的欧姆金属接触和沟道保护公开(公告)号：US07566916B2
公开(公告)日：2009-07-28
申请号：US10964875
申请日：2004-10-13
IPC分类号： H01L31/072
CPC分类号： H01L29/66462 , H01L21/24 , H01L21/242 , H01L21/28587 , H01L29/2003 , H01L29/452 , H01L29/66924
摘要： A method for fabricating a semiconductor device which protects the ohmic metal contacts and the channel of the device during subsequent high temperature processing steps is explained. An encapsulation layer is used to cover the channel and ohmic metal contacts. The present invention provides a substrate on which a plurality of semiconductor layers are deposited. The semiconductor layers act as the channel of the device. The semiconductor layers are covered with an encapsulation layer. A portion of the encapsulation layer and the plurality of semiconductor layers are removed, wherein ohmic metal contacts are deposited. The ohmic metal contacts are then annealed to help reduce their resistance. The encapsulation layer ensures that the ohmic metal contacts do not migrate during the annealing step and that the channel is not harmed by the high temperatures needed during the annealing step.
摘要翻译： 说明了在随后的高温处理步骤中制造保护欧姆金属触点和器件通道的半导体器件的方法。 封装层用于覆盖通道和欧姆金属触点。 本发明提供一种其上沉积有多个半导体层的衬底。 半导体层用作器件的通道。 半导体层被封装层覆盖。 去除封装层和多个半导体层的一部分，其中沉积欧姆金属接触。 然后将欧姆金属触点退火以帮助降低其电阻。 封装层确保在退火步骤期间欧姆金属接触不迁移，并且该通道不会受退火步骤期间所需的高温的损害。
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公开(公告)号：US20050048747A1
公开(公告)日：2005-03-03
申请号：US10964875
申请日：2004-10-13
申请人： Tahir Hussain , Miroslav Micovic , Paul Hashimoto , Gary Peng , Ara Kurdoghlian
发明人： Tahir Hussain , Miroslav Micovic , Paul Hashimoto , Gary Peng , Ara Kurdoghlian
IPC分类号： H01L21/24 , H01L21/285 , H01L21/335 , H01L21/337 , H01L29/20 , H01L29/45 , H01L21/28
CPC分类号： H01L29/66462 , H01L21/24 , H01L21/242 , H01L21/28587 , H01L29/2003 , H01L29/452 , H01L29/66924
摘要： A method for fabricating a semiconductor device which protects the ohmic metal contacts and the channel of the device during subsequent high temperature processing steps is explained. An encapsulation layer is used to cover the channel and ohmic metal contacts. The present invention provides a substrate on which a plurality of semiconductor layers are deposited. The semiconductor layers act as the channel of the device. The semiconductor layers are covered with an encapsulation layer. A portion of the encapsulation layer and the plurality of semiconductor layers are removed, wherein ohmic metal contacts are deposited. The ohmic metal contacts are then annealed to help reduce their resistance. The encapsulation layer ensures that the ohmic metal contacts do not migrate during the annealing step and that the channel is not harmed by the high temperatures needed during the annealing step.
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5.发明授权Ohmic contacts for high electron mobility transistors and a method of making the same 有权用于高电子迁移率晶体管的欧姆接触及其制造方法公开(公告)号：US06852615B2
公开(公告)日：2005-02-08
申请号：US10457506
申请日：2003-06-09
IPC分类号： H01L21/285 , H01L29/20 , H01L29/417 , H01L29/45 , H10L21/338
CPC分类号： H01L29/452 , H01L21/28575 , H01L29/2003 , H01L29/41725 , Y10S438/975 , Y10S438/978
摘要： A process and related product in which ohmic contacts are formed in High Electron Mobility Transistors (HEMTs) employing compound substrates such as gallium nitride. An improved device and an improvement to a process for fabrication of ohmic contacts to GaN/AlGaN HEMTs using a novel two step resist process to fabricate the ohmic contacts are described. This novel two-step process consists of depositing a plurality of layers having compounds of Group III V elements on a substrate; patterning and depositing a first photoresist on one of the layers; etching recessed areas into this layer; depositing ohmic metals on the recessed areas; removing the first photoresist; patterning and depositing a second photoresist, smaller in profile than the first photoresist, on the layer; depositing more ohmic metal on the layer allowing for complete coverage of the recessed areas; removing the second photoresist, and annealing the semiconductor structure.
摘要翻译： 在使用诸如氮化镓的复合衬底的高电子迁移率晶体管（HEMT）中形成欧姆接触的工艺及相关产品。 描述了使用新颖的两步抗蚀剂工艺制造欧姆接触的改进的器件和用于制造对GaN / AlGaN HEMT的欧姆接触的工艺的改进。 这种新型的两步法包括在基片上沉积多层具有IIIV族元素化合物的层; 在其中一层上图案化和沉积第一光致抗蚀剂; 将凹陷区域蚀刻到该层中; 在凹陷区域沉积欧姆金属; 去除第一光致抗蚀剂; 在该层上图案化和沉积比第一光致抗蚀剂更小的第二光致抗蚀剂; 在该层上沉积更多的欧姆金属，允许完全覆盖凹陷区域; 去除第二光致抗蚀剂，并退火半导体结构。
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6.发明授权公开(公告)号：US07470941B2
公开(公告)日：2008-12-30
申请号：US10313374
申请日：2002-12-06
IPC分类号： H01L31/0328
CPC分类号： H01L29/66462 , H01L21/28575 , H01L21/28581 , H01L21/28587 , H01L29/2003 , H01L29/7787
摘要： A method for fabricating heterojunction field effect transistors (HFET) and a family of HFET layer structures are presented. In the method, a step of depositing a HFET semiconductor structure onto a substrate is performed. Next, a photoresist material is deposited. Portions of the photoresist material are removed corresponding to source and drain pad pairs. A metal layer is deposited onto the structure, forming source pad and drain pad pairs. The photoresist material is removed, exposing the structure in areas other than the source and drain pad pairs. Each source and drain pad pair has a corresponding exposed area. The structure is annealed and devices are electrically isolated. The exposed area of each device is etched to form a gate recess and a gate structure is formed in the recess. Semiconductor layer structures for GaN/AlGaN HFETs are also presented.
摘要翻译： 提出了一种用于制造异质结场效应晶体管（HFET）和一系列HFET层结构的方法。 在该方法中，执行将HFET半导体结构沉积到衬底上的步骤。 接下来，沉积光致抗蚀剂材料。 对应于源极和漏极焊盘对，去除部分光致抗蚀剂材料。 金属层沉积在结构上，形成源极焊盘和漏极焊盘对。 去除光致抗蚀剂材料，将其暴露于不同于源极和漏极焊盘对的区域中。 每个源极和漏极焊盘对具有相应的曝光区域。 该结构进行退火，并且器件是电隔离的。 蚀刻每个器件的暴露面积以形成栅极凹部，并且在凹部中形成栅极结构。 还提出了用于GaN / AlGaN HFET的半导体层结构。
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7.发明授权公开(公告)号：US07598131B1
公开(公告)日：2009-10-06
申请号：US12290921
申请日：2008-11-05
IPC分类号： H01L21/338
CPC分类号： H01L29/66462 , H01L21/28575 , H01L21/28581 , H01L21/28587 , H01L29/2003 , H01L29/7787
摘要： A method for fabricating heterojunction field effect transistors (HFET) and a family of HFET layer structures are presented. In the method, a step of depositing a HFET semiconductor structure onto a substrate is performed. Next, a photoresist material is deposited. Portions of the photoresist material are removed corresponding to source and drain pad pairs. A metal layer is deposited onto the structure, forming source pad and drain pad pairs. The photoresist material is removed, exposing the structure in areas other than the source and drain pad pairs. Each source and drain pad pair has a corresponding exposed area. The structure is annealed and devices are electrically isolated. The exposed area of each device is etched to form a gate recess and a gate structure is formed in the recess. Semiconductor layer structures for GaN/AlGaN HFETs are also presented.
摘要翻译： 提出了一种用于制造异质结场效应晶体管（HFET）和一系列HFET层结构的方法。 在该方法中，执行将HFET半导体结构沉积到衬底上的步骤。 接下来，沉积光致抗蚀剂材料。 对应于源极和漏极焊盘对，去除部分光致抗蚀剂材料。 金属层沉积在结构上，形成源极焊盘和漏极焊盘对。 去除光致抗蚀剂材料，将其暴露于不同于源极和漏极焊盘对的区域中。 每个源极和漏极焊盘对具有相应的曝光区域。 该结构进行退火，并且器件是电隔离的。 蚀刻每个器件的暴露面积以形成栅极凹部，并且在凹部中形成栅极结构。 还提出了用于GaN / AlGaN HFET的半导体层结构。
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公开(公告)号：US07098490B2
公开(公告)日：2006-08-29
申请号：US10832691
申请日：2004-04-26
IPC分类号： H01L29/772
CPC分类号： H01L29/66462 , H01L29/2003 , H01L29/7787
摘要： The present invention provides a GaN based DHFET that helps confine the 2DEG to the channel layer, and reduces the 2DHG. The present invention provides a GaN DHFET having a channel layer comprising GaN and a buffer layer comprising AlxGa1−xN. The Al content in the buffer layer is specifically chosen based on the thickness of the channel layer using a graph. By choosing the Al content in the buffer layer and thickness of the channel layer in accordance with the graph provided in the present invention, the ability of the buffer layer to help confine the 2DEG to the channel layer is improved.
摘要翻译： 本发明提供了一种GaN基DHFET，其帮助将2DEG限制到沟道层，并且减少2DHG。 本发明提供了具有包含GaN的沟道层和包括Al x Ga 1-x N的缓冲层的GaN DHFET。 缓冲层中的Al含量是使用图表基于沟道层的厚度特别选择的。 通过根据本发明提供的图来选择缓冲层中的Al含量和沟道层的厚度，缓冲层有助于将2DEG限制到沟道层的能力得到改善。
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9.发明授权Method of integrating a plurality of benzocyclobutene layers with a substrate and an associated device 有权将多个苯并环丁烯层与基材和相关装置整合的方法公开(公告)号：US08592983B2
公开(公告)日：2013-11-26
申请号：US13310074
申请日：2011-12-02
申请人： Hasan Sharifi , Alexandros D. Margomenos , Ara K. Kurdoghlian , Miroslav Micovic , Keisuke Shinohara , Colleen M. Butler
发明人： Hasan Sharifi , Alexandros D. Margomenos , Ara K. Kurdoghlian , Miroslav Micovic , Keisuke Shinohara , Colleen M. Butler
IPC分类号： H01L23/532 , H01L51/40
CPC分类号： H01L23/53252 , H01L23/5329 , H01L2924/0002 , H01L2924/00
摘要： A method of integrating benzocyclobutene (BCB) layers with a substrate is provided along with a corresponding device. A method includes forming a first BCB layer on the substrate and depositing a first metal layer on the first BCB layer and within vias defined by the first metal layer. The method also forms a second BCB layer on the first metal layer and deposits a second metal layer on the second BCB layer and within vias defined by the second metal layer. The second metal layer extends through the vias defined by the second metal layer to establish an operable connection with the first metal layer. The first and second metal layers are independent of an electrical connection to any circuit element carried by the substrate, but the first and second metal layers secure the second BCB layer to the underlying structure and reduce the likelihood of delamination.
摘要翻译： 将苯并环丁烯（BCB）层与基板一体化的方法与相应的装置一起提供。 一种方法包括在衬底上形成第一BCB层，并在第一BCB层上以及在由第一金属层限定的通孔内沉积第一金属层。 该方法还在第一金属层上形成第二BCB层，并在第二BCB层上以及由第二金属层限定的通孔内沉积第二金属层。 第二金属层延伸穿过由第二金属层限定的通孔，以建立与第一金属层的可操作连接。 第一和第二金属层独立于与由衬底承载的任何电路元件的电连接，但第一和第二金属层将第二BCB层固定到下面的结构并降低分层的可能性。
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10.发明申请METHOD OF INTEGRATING A PLURALITY OF BENZOCYCLOBUTENE LAYERS WITH A SUBSTRATE AND AN ASSOCIATED DEVICE 有权用底物和相关器件集成多种含量的苯甲酸酯层的方法公开(公告)号：US20130140579A1
公开(公告)日：2013-06-06
申请号：US13310074
申请日：2011-12-02
申请人： Hasan Sharifi , Alexandros D. Margomenos , Ara K. Kurdoghlian , Miroslav Micovic , Keisuke Shinohara , Colleen M. Butler
发明人： Hasan Sharifi , Alexandros D. Margomenos , Ara K. Kurdoghlian , Miroslav Micovic , Keisuke Shinohara , Colleen M. Butler
IPC分类号： H01L29/20 , H01L23/52 , H01L21/768
CPC分类号： H01L23/53252 , H01L23/5329 , H01L2924/0002 , H01L2924/00
摘要： A method of integrating benzocyclobutene (BCB) layers with a substrate is provided along with a corresponding device. A method includes forming a first BCB layer on the substrate and depositing a first metal layer on the first BCB layer and within vias defined by the first metal layer. The method also forms a second BCB layer on the first metal layer and deposits a second metal layer on the second BCB layer and within vias defined by the second metal layer. The second metal layer extends through the vias defined by the second metal layer to establish an operable connection with the first metal layer. The first and second metal layers are independent of an electrical connection to any circuit element carried by the substrate, but the first and second metal layers secure the second BCB layer to the underlying structure and reduce the likelihood of delamination.
摘要翻译： 将苯并环丁烯（BCB）层与基板一体化的方法与相应的装置一起提供。 一种方法包括在衬底上形成第一BCB层，并在第一BCB层上以及在由第一金属层限定的通孔内沉积第一金属层。 该方法还在第一金属层上形成第二BCB层，并在第二BCB层上以及由第二金属层限定的通孔内沉积第二金属层。 第二金属层延伸穿过由第二金属层限定的通孔，以建立与第一金属层的可操作连接。 第一和第二金属层独立于与由衬底承载的任何电路元件的电连接，但第一和第二金属层将第二BCB层固定到下面的结构并降低分层的可能性。
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