公开(公告)号：US12237226B2

公开(公告)日：2025-02-25

申请号：US18447581

申请日：2023-08-10

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Tsung-Hsing Lu ,  Jun He ,  Li-Huan Chu ,  Pei-Haw Tsao

IPC: H01L21/768 ,  H01L21/304 ,  H01L21/78 ,  H01L23/00 ,  H01L25/00 ,  H01L25/065

Abstract: A semiconductor structure includes a first device and a second device bonded on the first device. The first device has a first sidewall distal to the second device and a second sidewall proximal to the second device. A surface roughness of the second sidewall is larger than a surface roughness of the first sidewall. The second device has a third sidewall proximal to the first device and a fourth sidewall distal to the first device. A surface roughness of the fourth sidewall is larger than a surface roughness of the third sidewall.

公开(公告)号：US20240395621A1

公开(公告)日：2024-11-28

申请号：US18788363

申请日：2024-07-30

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Tsung-Hsing Lu ,  Jun He ,  Li-Huan Chu ,  Pei-Haw Tsao

IPC: H01L21/78 ,  H01L21/304 ,  H01L21/768 ,  H01L23/00 ,  H01L25/00 ,  H01L25/065

Abstract: A method includes receiving a first wafer having a first device layer on a first semiconductor substrate, receiving a second wafer having a second device layer on a second semiconductor substrate, forming a first groove along a first scribing channel of the first wafer with a non-mechanical cutting process, and forming a second groove along a second scribing channel of the second wafer with the non-mechanical cutting process. The method further includes after the forming of the first and second grooves, bonding the first and second wafers together, and dicing the bonded first and second wafers through the first and second grooves with a mechanical cutting process.

公开(公告)号：US20230402324A1

公开(公告)日：2023-12-14

申请号：US18447581

申请日：2023-08-10

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Tsung-Hsing Lu ,  Jun He ,  Li-Huan Chu ,  Pei-Haw Tsao

IPC: H01L21/78 ,  H01L21/768 ,  H01L25/065 ,  H01L23/00 ,  H01L25/00 ,  H01L21/304

CPC classification number: H01L21/78 ,  H01L21/76898 ,  H01L25/0657 ,  H01L24/83 ,  H01L25/50 ,  H01L24/94 ,  H01L21/3043

Abstract: A semiconductor structure includes a first device and a second device bonded on the first device. The first device has a first sidewall distal to the second device and a second sidewall proximal to the second device. A surface roughness of the second sidewall is larger than a surface roughness of the first sidewall. The second device has a third sidewall proximal to the first device and a fourth sidewall distal to the first device. A surface roughness of the fourth sidewall is larger than a surface roughness of the third sidewall.

公开(公告)号：US20230045422A1

公开(公告)日：2023-02-09

申请号：US17678774

申请日：2022-02-23

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Li-Hsien Huang ,  Yao-Chun Chuang ,  SyuFong Li ,  Ching-Pin Lin ,  Jun He

IPC: H01L23/00 ,  H01L21/66 ,  H01L21/683 ,  H01L23/48

Abstract: In an embodiment, a method includes attaching a first package component to a first carrier, the first package component comprising: an aluminum pad disposed adjacent to a substrate; a sacrificial pad disposed adjacent to the substrate, the sacrificial pad comprising a major surface opposite the substrate, a protrusion of the sacrificial pad extending from the major surface; and a dielectric bond layer disposed around the aluminum pad and the sacrificial pad; attaching a second carrier to the first package component and the first carrier, the first package component being interposed between the first carrier and the second carrier; removing the first carrier; planarizing the dielectric bond layer to comprise a top surface being coplanar with the protrusion; and etching a portion of the protrusion.

公开(公告)号：US20210358808A1

公开(公告)日：2021-11-18

申请号：US17387525

申请日：2021-07-28

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Tsung-Hsing Lu ,  Jun He ,  Li-Huan Chu ,  Pei-Haw Tsao

IPC: H01L21/78 ,  H01L21/768 ,  H01L25/065 ,  H01L23/00 ,  H01L25/00 ,  H01L21/304

Abstract: A semiconductor structure includes a first device and a second device bonded on the first device. The first device has a first sidewall distal to the second device and a second sidewall proximal to the second device. A surface roughness of the second sidewall is larger than a surface roughness of the first sidewall.

公开(公告)号：US20240258263A1

公开(公告)日：2024-08-01

申请号：US18631900

申请日：2024-04-10

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Li-Hsien Huang ,  Yao-Chun Chuang ,  SyuFong Li ,  Ching-Pin Lin ,  Jun He

IPC: H01L23/00 ,  H01L21/66 ,  H01L21/683 ,  H01L23/48

CPC classification number: H01L24/27 ,  H01L21/6835 ,  H01L22/14 ,  H01L23/481 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/30 ,  H01L2224/0384 ,  H01L2224/0401 ,  H01L2224/05624 ,  H01L2224/06515 ,  H01L2224/275 ,  H01L2224/30181 ,  H01L2924/30105 ,  H01L2924/35121 ,  H01L2924/37001

Abstract: In an embodiment, a method includes attaching a first package component to a first carrier, the first package component comprising: an aluminum pad disposed adjacent to a substrate; a sacrificial pad disposed adjacent to the substrate, the sacrificial pad comprising a major surface opposite the substrate, a protrusion of the sacrificial pad extending from the major surface; and a dielectric bond layer disposed around the aluminum pad and the sacrificial pad; attaching a second carrier to the first package component and the first carrier, the first package component being interposed between the first carrier and the second carrier; removing the first carrier; planarizing the dielectric bond layer to comprise a top surface being coplanar with the protrusion; and etching a portion of the protrusion.

公开(公告)号：US12051624B2

公开(公告)日：2024-07-30

申请号：US17387525

申请日：2021-07-28

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Tsung-Hsing Lu ,  Jun He ,  Li-Huan Chu ,  Pei-Haw Tsao

IPC: H01L25/065 ,  H01L21/304 ,  H01L21/768 ,  H01L21/78 ,  H01L23/00 ,  H01L25/00

CPC classification number: H01L21/78 ,  H01L21/3043 ,  H01L21/76898 ,  H01L24/83 ,  H01L24/94 ,  H01L25/0657 ,  H01L25/50

Abstract: A semiconductor structure includes a first device and a second device bonded on the first device. The first device has a first sidewall distal to the second device and a second sidewall proximal to the second device. A surface roughness of the second sidewall is larger than a surface roughness of the first sidewall.

公开(公告)号：US11984422B2

公开(公告)日：2024-05-14

申请号：US17678774

申请日：2022-02-23

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Li-Hsien Huang ,  Yao-Chun Chuang ,  SyuFong Li ,  Ching-Pin Lin ,  Jun He

IPC: H01L21/683 ,  H01L21/66 ,  H01L23/00 ,  H01L23/48

CPC classification number: H01L24/27 ,  H01L21/6835 ,  H01L22/14 ,  H01L23/481 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/30 ,  H01L2224/0384 ,  H01L2224/0401 ,  H01L2224/05624 ,  H01L2224/06515 ,  H01L2224/275 ,  H01L2224/30181 ,  H01L2924/30105 ,  H01L2924/35121 ,  H01L2924/37001

Abstract: In an embodiment, a method includes attaching a first package component to a first carrier, the first package component comprising: an aluminum pad disposed adjacent to a substrate; a sacrificial pad disposed adjacent to the substrate, the sacrificial pad comprising a major surface opposite the substrate, a protrusion of the sacrificial pad extending from the major surface; and a dielectric bond layer disposed around the aluminum pad and the sacrificial pad; attaching a second carrier to the first package component and the first carrier, the first package component being interposed between the first carrier and the second carrier; removing the first carrier; planarizing the dielectric bond layer to comprise a top surface being coplanar with the protrusion; and etching a portion of the protrusion.

公开(公告)号：US20230290747A1

公开(公告)日：2023-09-14

申请号：US17826519

申请日：2022-05-27

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chien-Hung Chen ,  Cheng-Pu Chiu ,  Chien-Chen Li ,  Chien-Li Kuo ,  Ting-Ting Kuo ,  Li-Hsien Huang ,  Yao-Chun Chuang ,  Jun He

IPC: H01L23/00 ,  H01L25/10 ,  H01L23/31 ,  H01L23/538 ,  H01L21/683 ,  H01L21/48 ,  H01L21/56

CPC classification number: H01L24/06 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/565 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3128 ,  H01L23/5383 ,  H01L23/5386 ,  H01L23/5389 ,  H01L24/20 ,  H01L25/105 ,  H01L2221/68359 ,  H01L2224/06519 ,  H01L2224/214 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2225/1094

Abstract: Embodiments provide metal features which dissipate heat generated from a laser drilling process for exposing dummy pads through a dielectric layer. Because the dummy pads are coupled to the metal features, the metal features act as a heat dissipation feature to pull heat from the dummy pad. As a result, reduction in heat is achieved at the dummy pad during the laser drilling process.

公开(公告)号：US11081392B2

公开(公告)日：2021-08-03

申请号：US16559302

申请日：2019-09-03

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Tsung-Hsing Lu ,  Jun He ,  Li-Huan Chu ,  Pei-Haw Tsao

IPC: H01L21/78 ,  H01L21/768 ,  H01L25/065 ,  H01L23/00 ,  H01L25/00 ,  H01L21/304

Abstract: A method includes providing first and second wafers; forming a first device layer in a top portion of the first wafer; forming a second device layer in a top portion of the second wafer; forming a first groove in the first device layer; forming a second groove in the second device layer; bonding the first and second wafers together after at least one of the first and second grooves is formed; and dicing the bonded first and second wafers by a cutting process, wherein the cutting process cuts through the first and second grooves.