公开(公告)号：US5994233A

公开(公告)日：1999-11-30

申请号：US172507

申请日：1998-10-14

申请人： Tong-Yu Chen ,  Chan-Lon Yang ,  Tsu-An Lin

发明人： Tong-Yu Chen ,  Chan-Lon Yang ,  Tsu-An Lin

IPC分类号： H01L21/311 ,  H01L21/00 ,  H01L21/3065

CPC分类号： H01L21/31116

摘要： An oxide etching method using low-medium density plasma includes a first etching step to pre-etch the oxide layer with low etching selectivity etchant to pre-form a contact opening and a monitoring opening. The low etching selectivity etchant can also etch the photoresist layer and the photoresist reaction residue. Then, a second etching with high etching selectivity on the oxide is performed to completely form the contact opening with a SAC property and the monitoring opening. The openings expose the substrate.

摘要翻译： 使用低介质密度等离子体的氧化物蚀刻方法包括用低蚀刻选择性蚀刻剂预蚀刻氧化物层以预先形成接触开口和监测开口的第一蚀刻步骤。 低蚀刻选择性蚀刻剂也可以蚀刻光致抗蚀剂层和光致抗蚀剂反应残余物。 然后，执行对氧化物具有高蚀刻选择性的第二蚀刻，以完全形成具有SAC特性和监测开口的接触开口。 开口露出基板。

公开(公告)号：US06180532B2

公开(公告)日：2001-01-30

申请号：US09213129

申请日：1998-12-15

申请人： Chan-Lon Yang ,  Tong-Yu Chen ,  Tsu-An Lin

发明人： Chan-Lon Yang ,  Tong-Yu Chen ,  Tsu-An Lin

IPC分类号： H01L213065

CPC分类号： H01L21/76897 ,  H01L21/31116 ,  H01L21/31144

摘要： A method for forming a contact hole in a silicon oxide layer formed over a silicon nitride layer and a substrate performs an etching process with an etchant, C4F8/Ar or C4F8/C2F6/Ar, on an inductively coupled plasma etcher. The inductively coupled plasma etcher contains a chamber, a ring, and a roof. The etchant used in the etching process is controlled by conditions that include a C4F8 flow of about 10 to 20 sccm, a CO flow of less than about 100 sccm, and an Ar flow of about 50 to 500 sccm. In the meantime, the conditions of the inductively coupled plasma etcher include a roof temperature of about 150 to 300 ° C., a ring temperature of about 150 to 400 ° C., and a pressure within the chamber of about 4 to 50 mtorr. By performing a plasma etching process under the foregoing conditions, a properly profiled contact hole is obtained.

摘要翻译： 在形成在氮化硅层和基板上的氧化硅层中形成接触孔的方法在电感耦合等离子体蚀刻器上用蚀刻剂C4F8 / Ar或C4F8 / C2F6 / Ar进行蚀刻处理。 电感耦合等离子体蚀刻器包含一个室，一个环和一个屋顶。 在蚀刻工艺中使用的蚀刻剂由包括约10至20sccm的C 4 F 8流量，小于约100sccm的CO流量和约50至500sccm的Ar流量的条件控制。 同时，电感耦合等离子体蚀刻器的条件包括约150-300℃的屋顶温度，约150-400℃的环境温度和室内压力为约4-50mtorr。 通过在上述条件下进行等离子体蚀刻工艺，可以获得适当的异型接触孔。

公开(公告)号：US06197698B1

公开(公告)日：2001-03-06

申请号：US09340400

申请日：1999-06-28

申请人： Jui-Tsen Huang ,  Kuang-Hua Shih ,  Tsu-An Lin ,  Chan-Lon Yang

发明人： Jui-Tsen Huang ,  Kuang-Hua Shih ,  Tsu-An Lin ,  Chan-Lon Yang

IPC分类号： H01L213065

CPC分类号： H01L21/32139 ,  H01L21/28035 ,  H01L21/32137 ,  H01L21/823437

摘要： The present invention provides a method for etching a poly-silicon layer of a semiconductor wafer. The semiconductor wafer comprises a dielectric layer, a poly-silicon layer situated on the dielectric layer and containing dopants to a predetermined depth, and a photo-resist layer having a rectangular cross-section above a predetermined area of the poly-silicon layer. The semiconductor wafer is processed in a plasma chamber. A first dry-etching process is performed to vertically etch away the dopant-containing portion of the poly-silicon layer not covered by the photo-resist layer. Then, a second dry-etching process is performed to vertically etch away the residual portion of the poly-silicon layer not covered by the photo-resist layer down to the surface of the dielectric layer. The etching gases used in the first dry-etching process differ from those used in the second dry-etching process, and the main etching gas of the first dry-etching process is C2F6.

摘要翻译： 本发明提供一种蚀刻半导体晶片的多晶硅层的方法。 半导体晶片包括电介质层，位于电介质层上的多晶硅层，并且含有预定深度的掺杂剂，以及在多晶硅层的预定区域之上具有矩形横截面的光致抗蚀剂层。 半导体晶片在等离子体室中进行处理。 执行第一干蚀刻工艺以垂直蚀刻掉未被光致抗蚀剂层覆盖的多晶硅层的含掺杂物部分。 然后，进行第二干法蚀刻工艺，以将未被光刻胶层覆盖的多晶硅层的剩余部分垂直蚀刻掉到电介质层的表面。 在第一干蚀刻工艺中使用的蚀刻气体与第二干蚀刻工艺中使用的蚀刻气体不同，第一干法蚀刻工艺的主蚀刻气体为C2F6。

公开(公告)号：US06221772B1

公开(公告)日：2001-04-24

申请号：US09352747

申请日：1999-07-14

申请人： Chan-Lon Yang ,  Tong-Yu Chen ,  Wei-Che Huang

发明人： Chan-Lon Yang ,  Tong-Yu Chen ,  Wei-Che Huang

IPC分类号： H01L21302

CPC分类号： H01L21/02063 ,  C11D7/02 ,  C11D11/0047 ,  G03F7/427 ,  H01L21/31138 ,  H01L21/76814

摘要： The present invention provides a method of in-situ cleaning polymers from holes on a semiconductor wafer and in-situ removing the silicon nitride layer. The semiconductor wafer comprising a substrate, a silicon nitride (Si3N4) layer on the substrate, a silicon oxide (SiO2) layer on the silicon nitride layer, and a photo-resist layer on the silicon oxide layer. The silicon oxide layer and the photo-resist layer have a hole extending down to the silicon nitride layer. The hole contains polymer left after etching of the silicon oxide layer. The method comprises performing a in-situ plasma ashing process by injecting oxygen (O2) and argon (Ar) to completely remove the photo-resist layer and the polymer remaining within the hole. Subsequently, the silicon nitride layer was removed in the same chamber. The flow rate of O2 is maintained between 50˜2000 sccm (standard cubic centimeter per minute) and the flow rate of Ar is maintained between 50˜500 sccm.

摘要翻译： 本发明提供了一种从半导体晶片上的孔中原位清洗聚合物并原位去除氮化硅层的方法。 包括衬底，衬底上的氮化硅（Si 3 N 4）层，氮化硅层上的氧化硅（SiO 2）层和氧化硅层上的光致抗蚀剂层的半导体晶片。 氧化硅层和光致抗蚀剂层具有向下延伸到氮化硅层的孔。 该孔含有在氧化硅层蚀刻后残留的聚合物。 该方法包括通过注入氧（O 2）和氩（Ar）进行原位等离子体灰化处理，以完全除去光刻胶层和留在孔内的聚合物。 随后，在相同的室中除去氮化硅层。 O2的流量保持在50〜2000sccm（标准立方厘米每分钟）之间，Ar的流量保持在50〜500sccm之间。

公开(公告)号：US6139702A

公开(公告)日：2000-10-31

申请号：US263386

申请日：1999-03-05

申请人： Chan-Lon Yang ,  Tong-Yu Chen ,  Michael W C Huang

发明人： Chan-Lon Yang ,  Tong-Yu Chen ,  Michael W C Huang

IPC分类号： C23C14/06 ,  C23C14/34 ,  H01L21/311 ,  G23C14/34

CPC分类号： C23C14/0682 ,  C23C14/3457 ,  H01L21/31116

摘要： A seasoning process for an etcher which is performed before etching a dielectric layer to expose a metal silicide layer. The seasoning process includes the first plasma sputtering process and the second plasma sputtering process. A wafer containing the metal silicide layer thereon is placed in the etcher with an etchant and the first plasma sputtering process is performed. Several silicon wafers are successively placed in the etcher to perform the second plasma sputtering process.

摘要翻译： 在蚀刻介电层以暴露金属硅化物层之前执行的蚀刻器的调味过程。 调味过程包括第一等离子体溅射工艺和第二等离子体溅射工艺。 将含有其上的金属硅化物层的晶片用蚀刻剂放置在蚀刻器中，并且执行第一等离子体溅射工艺。 将几个硅晶片依次放置在蚀刻器中以进行第二等离子体溅射工艺。

公开(公告)号：US6010968A

公开(公告)日：2000-01-04

申请号：US220541

申请日：1998-12-24

申请人： Chan-Lon Yang ,  Tong-Yu Chen ,  Keh-Ching Huang

发明人： Chan-Lon Yang ,  Tong-Yu Chen ,  Keh-Ching Huang

IPC分类号： H01L21/311 ,  H01L21/00

CPC分类号： H01L21/31116

摘要： A multilevel contact etching method to form a contact opening is provided. The method contains using an inductively coupled plasma (ICP) etcher to produce a high plasma density condition. The plasma gas etchant is composed of C.sub.4 F.sub.8 /CH.sub.2 F.sub.2 /CO/Ar with a ratio of 3:4:12:80 so that silicon nitride can be selectively etched while the silicon and silicide are not etched. Each content ratio of the plasma gas etchant allows a variance of about 20%. Wall temperature of the ICP etcher is about 100.degree. C.-300.degree. C. A cooling system for a wafer pad is about -20.degree. C.-20.degree. C. Chamber pressure is about 5-100 mtorr. Bias power on the wafer pad is about 1000 W-3000 W. Source power of an inductance coil is about 500 W-3000 W.

摘要翻译： 提供了形成接触开口的多层接触蚀刻方法。 该方法包括使用电感耦合等离子体（ICP）蚀刻器来产生高等离子体密度条件。 等离子体气体蚀刻剂由比例为3：4：12：80的C4F8 / CH2F2 / CO / Ar组成，以便在不蚀刻硅和硅化物的情况下，可以选择性地蚀刻氮化硅。 等离子体气体蚀刻剂的每个含量比允许约20％的变化。 ICP蚀刻器的壁温为约100℃-300℃。晶片垫的冷却系统为约-20℃-20℃。室压力为约5-100mtorr。 晶片垫上的偏置功率约为1000W-3000W。电感线圈的功率为约500W-3000W。

公开(公告)号：US06352938B2

公开(公告)日：2002-03-05

申请号：US09457561

申请日：1999-12-09

申请人： Tong-Yu Chen ,  Hsi-Ta Chuang ,  Chan-Lon Yang

发明人： Tong-Yu Chen ,  Hsi-Ta Chuang ,  Chan-Lon Yang

IPC分类号： H01L21302

CPC分类号： H01L21/76814 ,  H01L21/02063 ,  H01L21/31138 ,  H01L21/76838 ,  H01L21/76843 ,  H01L21/76865 ,  H01L21/76873 ,  H01L21/76879

摘要： A method of manufacturing metallic interconnects. A substrate has a copper line formed therein. An inter-metal dielectric layer is formed over the substrate and the copper line. A patterned photoresist layer is formed over the inter-metal dielectric layer. The inter-metal dielectric layer is etched to form a trench and a contact opening that exposes a portion of the copper line, wherein the contact opening is under the trench. At a low temperature and using a plasma derived from a gaseous mixture N2H2 (H2:4%)/O2, the photoresist layer is removed. Any copper oxide layer formed on the copper line in the process of removing photoresist material is reduced back to copper using gaseous N2H2 (H2:4%). A barrier layer conformal to the trench and the contact opening profile is formed. Copper is deposited to form a conformal first copper layer over the trench and the contact opening. Using the first copper layer as a seeding layer, a copper or a copperless electroplating is carried out so that a second copper layer is grown anisotropically over the first copper layer.

摘要翻译： 一种制造金属互连的方法。 基板上形成有铜线。 在衬底和铜线之上形成金属间介电层。 在金属间介电层上形成图案化的光致抗蚀剂层。 蚀刻金属间电介质层以形成暴露铜线的一部分的沟槽和接触开口，其中接触开口在沟槽下方。 在低温下并使用来自气态混合物N 2 H 2（H 2：4％）/ O 2）的等离子体，除去光致抗蚀剂层。 在除去光致抗蚀剂材料的工艺中在铜线上形成的任何铜氧化物层都使用气态N 2 H 2（H 2：4％）还原成铜。 形成与沟槽一致的阻挡层和形成接触开口轮廓。 沉积铜以在沟槽和接触开口上形成共形的第一铜层。 使用第一铜层作为接种层，进行铜或无铜电镀，使得第二铜层在第一铜层上各向异性地生长。

公开(公告)号：US6083845A

公开(公告)日：2000-07-04

申请号：US255678

申请日：1999-02-23

申请人： Chan-Lon Yang ,  Tong-Yu Chen

发明人： Chan-Lon Yang ,  Tong-Yu Chen

IPC分类号： H01L21/311 ,  H01L21/60 ,  H01L21/768 ,  H01L21/00

CPC分类号： H01L21/76897 ,  H01L21/31116 ,  H01L21/76816

摘要： An etching method used in the high density plasma etching system to etch a silicon oxide dielectric layer to form openings of different depths. The method uses a mixture of C.sub.4 H.sub.8, CH.sub.2 F.sub.2, and Ar as an etching gas source to etch the silicon oxide dielectric layer, forming a plurality of openings of a first depth. A mixture of C.sub.4 H.sub.8, CO, and Ar is used as an etching gas source to etch the silicon oxide dielectric layer exposed by the first opening, so that the opening is deepened to the second depth. Using a mixture of C.sub.4 H.sub.8, CH.sub.2 F.sub.2, CO, and Ar as the etching gas source, the silicon oxide dielectric layer exposed by the opening is etched, so that the openings are deepened to the third depth and the fourth depth.

摘要翻译： 在高密度等离子体蚀刻系统中使用蚀刻方法来蚀刻氧化硅介电层以形成不同深度的开口。 该方法使用C4H8，CH2F2和Ar的混合物作为蚀刻气体源来蚀刻氧化硅介电层，形成第一深度的多个开口。 使用C4H8，CO和Ar的混合物作为蚀刻气体源来蚀刻由第一开口暴露的氧化硅介电层，使得开口加深到第二深度。 使用C4H8，CH2F2，CO和Ar的混合物作为蚀刻气体源，蚀刻由开口暴露的氧化硅介电层，使得开口加深到第三深度和第四深度。

公开(公告)号：US06218084B1

公开(公告)日：2001-04-17

申请号：US09212727

申请日：1998-12-15

申请人： Chan-Lon Yang ,  Tong-Yu Chen ,  Michael W C Huang

发明人： Chan-Lon Yang ,  Tong-Yu Chen ,  Michael W C Huang

IPC分类号： G03F742

CPC分类号： H01L21/31138 ,  G03F7/427 ,  H01L21/31116

摘要： A method described for removing a photoresist/polymers layer on a substrate. The method comprises the steps of providing a wafer having an oxide layer, a photoresist/polymers layer, an opening penetrating through the photoresist/polymers layer and the oxide layer, and the sidewall polymer on the surface of photoresist layer and the oxide layer. An in-situ plasma-etching step using an additional gas mixed with oxygen as source is performed to remove the photoresist/polymers layer without residues, no damages to substrate and oxide and no changes on the critical dimension of the opening during etching step.

公开(公告)号：US06184147B2

公开(公告)日：2001-02-06

申请号：US09263421

申请日：1999-03-05

申请人： Chan-Lon Yang ,  Tong-Yu Chen ,  Keh-Ching Huang

发明人： Chan-Lon Yang ,  Tong-Yu Chen ,  Keh-Ching Huang

IPC分类号： H01L21302

CPC分类号： H01L21/76897 ,  H01J37/32082 ,  H01J2237/3347 ,  H01L21/31116 ,  H01L21/31144 ,  H01L21/76802

摘要： A method for forming a high aspect ration (HAR>4:1) borderless contact hole is described. The method forms a contact/via hole in the silicon oxide layer by performing an etching process with an etchant, C4F8/C2F6,/Ar/CO or C4F8/Ar/CO, on an etcher. The etcher includes a ring, a roof, a chiller and a chamber. The etchant used in the etching process is controlled under conditions including a C4F8 flow of about 10 to 20 sccm, a CO flow of about 1 to 100 sccm, and an Ar flow of about 100 to 500 sccm. The flow of C2F6 is about 0.5 to 1.5 times that of C4F8. The conditions of the etcher include a roof temperature of about 150 to 300° C., a chiller temperature of about −20 to 20° C., a wall temperature of about 150 to 400° C., a ring temperature of about 150 to 400° C., and a pressure within the chamber of about 4 to 50 mtorr. By controlling the chamber pressure and the deposition rate of the polymer molecules, a properly profiled contact hole is obtained.

摘要翻译： 描述了形成高纵横比（HAR> 4:1）无边界接触孔的方法。 该方法通过在蚀刻剂上用蚀刻剂C 4 F 8 / C 2 F 6，/ Ar / CO或C 4 F 8 / Ar / CO执行蚀刻处理来形成氧化硅层中的接触/通孔。 蚀刻器包括环，屋顶，冷却器和室。 在蚀刻工艺中使用的蚀刻剂在约10至20sccm的C 4 F 8流量，约1至100sccm的CO流量和约100至500sccm的Ar流量的条件下进行控制。 C2F6的流量约为C4F8的0.5〜1.5倍。 蚀刻器的条件包括约150至300℃的屋顶温度，约-20至20℃的冷却器温度，约150至400℃的壁温度，约150至400℃的环境温度 400℃，室内的压力为约4至50毫托。 通过控制室压力和聚合物分子的沉积速率，获得适当的异型接触孔。