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公开(公告)号：US09471257B2
公开(公告)日：2016-10-18
申请号：US14259828
申请日：2014-04-23
Applicant: Winbond Electronics Corp.
Inventor： Takehiro Kaminaga
CPC classification number: G06F3/0688 , G06F3/0611 , G06F3/0659
Abstract: A semiconductor memory device includes a memory array, a setting unit and a control unit. The memory array consists of non-volatile memory cells. The setting unit set a page address of the memory array which is initially read out at startup. The control unit performs an internal sequence to read out the page address from the setting unit at startup and, according to the read-out page address, transmits page data corresponding to the read-out page address from the memory array to a page buffer.
Abstract translation: 半导体存储器件包括存储器阵列，设置单元和控制单元。 存储器阵列由非易失性存储单元组成。 设置单元设置在启动时最初读出的存储器阵列的页面地址。 控制单元执行内部序列以在启动时从设置单元读出页面地址，并且根据读出的页面地址将与读出的页面地址相对应的页面数据从存储器阵列发送到页面缓冲器。
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公开(公告)号：US20240419369A1
公开(公告)日：2024-12-19
申请号：US18677892
申请日：2024-05-30
Applicant: Winbond Electronics Corp.
Inventor： Masaru Yano , Takehiro Kaminaga
IPC: G06F3/06
Abstract: An operating method of a semiconductor device including a NOR type flash memory and a NAND type flash memory is improved. A flash memory includes a NOR type flash memory, a NAND type flash memory, a controller, and an internal bus connecting the NOR type flash memory and the NAND type flash memory to the controller. The controller controls the NOR type flash memory, or the NOR type flash memory and the NAND type flash memory based on a command received from an outside.
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公开(公告)号：US12079075B2
公开(公告)日：2024-09-03
申请号：US17238158
申请日：2021-04-22
Applicant: Winbond Electronics Corp.
Inventor： Takehiro Kaminaga
CPC classification number: G06F11/1068 , G11C16/0483 , G11C16/26
Abstract: A semiconductor storage apparatus and an error checking and correction (ECC) related information reading method, which can output various information related to pages that have been error-corrected during a continuous reading operation, are provided. A NAND flash memory includes a memory cell array, a continuous reading component, an ECC related information memory part, and an output component. The continuous reading component continuously reads pages of the memory cell array. The ECC related information memory part stores page addresses of all of the pages that have been error-corrected by an ECC circuit regarding the pages continuously read by the continuous reading component. The output component outputs page addresses stored in the ECC related information memory part in response to a read command after the continuous reading operation.
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公开(公告)号：US10783095B2
公开(公告)日：2020-09-22
申请号：US15719199
申请日：2017-09-28
Applicant: WINBOND ELECTRONICS CORP.
Inventor： Takehiro Kaminaga , Katsutoshi Suito
Abstract: A semiconductor memory device is provided. The semiconductor memory device includes a memory cell array, a page-reading portion which selects a page of the memory cell array, reads data of the selected page, and transmits the read data to a data-holding portion, and a control portion which controls continuous reading of pages. When a command related to termination of the continuous reading is input, the control portion terminates the continuous reading. When the command related to the termination of the continuous reading is not input, the continuous reading terminates. During a period in which the continuous reading is performed continuously, even if a chip selection signal is toggled, the continuous reading can be performed continuously without inputting a page-data read command.
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公开(公告)号：US10453524B2
公开(公告)日：2019-10-22
申请号：US15614631
申请日：2017-06-06
Applicant: Winbond Electronics Corp.
Inventor： Takehiro Kaminaga , Katsutoshi Suito
Abstract: A semiconductor memory device, a flash memory and a continuous reading method thereof are provided for achieving a continuous reading of pages in high speed. A flash memory of the invention includes a memory cell array; a page reading element, which selects a page of the memory cell array and reads out data of the selected page to a page buffer/sense circuit; a page information storage element, which stores page information related to a range of a continuous reading; and a control element, which controls the continuous reading of the page. The control element determines whether to resume the continuous reading according to the page information. When it is determined to resume the continuous reading, the continuous reading can still be performed without a page data read command and a page address being inputted even if a chip select signal is toggled.
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Patent Agency Ranking
公开(公告)号：US20150324122A1
公开(公告)日：2015-11-12
申请号：US14567326
申请日：2014-12-11
Applicant: Winbond Electronics Corp.
Inventor： Takehiro Kaminaga
IPC: G06F3/06
CPC classification number: G06F21/60 , G06F3/061 , G06F3/0652 , G06F3/0655 , G06F3/0688 , G06F9/00 , G06F21/575 , G06F21/79 , G06F2221/2135 , G11C16/08 , G11C16/22 , G11C16/26
Abstract: The invention provides a flash memory which may effectively protect information with a high security level. A flash memory includes a setting part. When the setting part is inputted a specific command, the setting part sets up specific address information to a nonvolatile configuration register, and sets up specific data in a hidden storage region. The flash memory also includes: a comparing part, which compares inputted address information and the specific address information during a reading operation; and a control part, which reads specific data set in the storage region and erases a specific address when two address information are consistent, and reads data stored in a memory array according to the inputted address information when two address information are inconsistent.
Abstract translation: 本发明提供一种闪存，其可以有效地保护具有高安全级别的信息。 闪存包括设置部分。 当设置部分输入特定命令时，设置部分将特定地址信息设置到非易失性配置寄存器，并将隐藏存储区域中的特定数据设置。 闪速存储器还包括：比较部分，其在读取操作期间比较输入的地址信息和特定的地址信息; 以及控制部分，其读取存储区域中的特定数据集并且当两个地址信息一致时擦除特定地址，并且当两个地址信息不一致时，根据输入的地址信息读取存储在存储器阵列中的数据。
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公开(公告)号：US20240265964A1
公开(公告)日：2024-08-08
申请号：US18429450
申请日：2024-02-01
Applicant: Winbond Electronics Corp.
Inventor： Masaru Yano , Masato Ono , Takehiro Kaminaga
IPC: G11C11/56
CPC classification number: G11C11/56
Abstract: A flash memory that improves the reliability of data stored in a memory cell array is provided in the disclosure. A wear leveling method of the flash memory of the disclosure includes the following operation. The memory cell array includes multiple sectors, the method includes the following operation. A region is set for storing a first flag and a second flag in each sector of multiple sectors of the memory cell array. The first flag indicates whether bit correction has occurred, and the second flag indicates whether specific data is stored. The second flag of a source sector among the sectors in which the specific data is stored is set. The specific data is written to a new sector among the sectors in which the first flag is in a reset state, and the second flag of the new sector is set.
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公开(公告)号：US20210357288A1
公开(公告)日：2021-11-18
申请号：US17238158
申请日：2021-04-22
Applicant: Winbond Electronics Corp.
Inventor： Takehiro Kaminaga
Abstract: A semiconductor storage apparatus and an error checking and correction (ECC) related information reading method, which can output various information related to pages that have been error-corrected during a continuous reading operation, are provided. A NAND flash memory includes a memory cell array, a continuous reading component, an ECC related information memory part, and an output component. The continuous reading component continuously reads pages of the memory cell array. The ECC related information memory part stores page addresses of all of the pages that have been error-corrected by an ECC circuit regarding the pages continuously read by the continuous reading component. The output component outputs page addresses stored in the ECC related information memory part in response to a read command after the continuous reading operation.
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公开(公告)号：US09953170B2
公开(公告)日：2018-04-24
申请号：US14567326
申请日：2014-12-11
Applicant: Winbond Electronics Corp.
Inventor： Takehiro Kaminaga
CPC classification number: G06F21/60 , G06F3/061 , G06F3/0652 , G06F3/0655 , G06F3/0688 , G06F9/00 , G06F21/575 , G06F21/79 , G06F2221/2135 , G11C16/08 , G11C16/22 , G11C16/26
Abstract: The invention provides a flash memory which may effectively protect information with a high security level. A flash memory includes a setting part. When the setting part is inputted a specific command, the setting part sets up specific address information to a nonvolatile configuration register, and sets up specific data in a hidden storage region. The flash memory also includes: a comparing part, which compares inputted address information and the specific address information during a reading operation; and a control part, which reads specific data set in the storage region and erases a specific address when two address information are consistent, and reads data stored in a memory array according to the inputted address information when two address information are inconsistent.
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公开(公告)号：US20180090202A1
公开(公告)日：2018-03-29
申请号：US15614631
申请日：2017-06-06
Applicant: Winbond Electronics Corp.
Inventor： Takehiro Kaminaga , Katsutoshi Suito
IPC: G11C11/56 , G11C7/10 , G11C11/408 , G11C11/4074 , H03K19/08
Abstract: A semiconductor memory device, a flash memory and a continuous reading method thereof are provided for achieving a continuous reading of pages in high speed. A flash memory 100 of the invention includes a memory cell array 110; a page reading element, which selects a page of the memory cell array 110 and reads out data of the selected page to a page buffer/sense circuit 180; a page information storage element 160, which stores page information related to a range of a continuous reading; and a control element 150, which controls the continuous reading of the page. The control element 150 determines whether to resume the continuous reading according to the page information. When it is determined to resume the continuous reading, the continuous reading can still be performed without a page data read command and a page address being inputted even if a chip select signal is toggled.
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