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公开(公告)号：US07292382B2
公开(公告)日：2007-11-06
申请号：US11346936
申请日：2006-02-03
IPC分类号： G02F1/03
CPC分类号： G11C13/042 , G02F1/055 , G02F2201/124 , G02F2203/12 , G09G3/346 , G09G2300/0857
摘要： A light control unit comprises: a substrate; an insulating film; a first transistor; a reflecting film formed on the insulating film; a light modulating film formed on the reflecting film; a plurality of pairs of electrodes arranged two-dimensionally on the light modulating film; and a polarizing plate formed on a first electrode. Here, the light modulating film is made of a material that varies in refractive index in accordance with the intensity of an electric field applied thereto. For such a material, PLZT containing Pb, Zr, Ti, and La as constituent elements may be used.
摘要翻译： 光控制单元包括：基板; 绝缘膜; 第一晶体管; 形成在绝缘膜上的反射膜; 形成在反射膜上的光调制膜; 在光调制膜上二维布置的多对电极; 以及形成在第一电极上的偏振片。 这里，光调制膜由根据施加到其上的电场强度的折射率变化的材料制成。 对于这种材料，可以使用含有Pb，Zr，Ti和La作为构成元素的PLZT。
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公开(公告)号：US20060126360A1
公开(公告)日：2006-06-15
申请号：US11346936
申请日：2006-02-03
IPC分类号： F21V7/04
CPC分类号： G11C13/042 , G02F1/055 , G02F2201/124 , G02F2203/12 , G09G3/346 , G09G2300/0857
摘要： A light control unit comprises: a substrate; an insulating film; a first transistor; a reflecting film formed on the insulating film; a light modulating film formed on the reflecting film; a plurality of pairs of electrodes arranged two-dimensionally on the light modulating film; and a polarizing plate formed on a first electrode. Here, the light modulating film is made of a material that varies in refractive index in accordance with the intensity of an electric field applied thereto. For such a material, PLZT containing Pb, Zr, Ti, and La as constituent elements may be used.
摘要翻译： 光控制单元包括：基板; 绝缘膜; 第一晶体管; 形成在绝缘膜上的反射膜; 形成在反射膜上的光调制膜; 在光调制膜上二维布置的多对电极; 以及形成在第一电极上的偏振片。 这里，光调制膜由根据施加到其上的电场强度的折射率变化的材料制成。 对于这种材料，可以使用含有Pb，Zr，Ti和La作为构成元素的PLZT。
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公开(公告)号：US20060193233A1
公开(公告)日：2006-08-31
申请号：US11371669
申请日：2006-03-09
IPC分类号： G11B7/00
CPC分类号： G09G3/20 , G02F1/13624 , G09G2300/0809 , G09G2300/0857 , G11C13/04
摘要： A light control apparatus including a plurality of two-dimensionally arranged pixels, each of the plurality of pixels comprising a first storage element which stores a luminance value of a present frame for the pixel; a second storage element which stores a preliminary luminance value for the pixel; and a switching element which changes the luminance value for the pixel by transferring the luminance value stored in the second storage element to the first storage element.
摘要翻译： 一种光控制装置，包括多个二维排列的像素，所述多个像素中的每一个包括存储所述像素的当前帧的亮度值的第一存储元件; 存储所述像素的预备亮度值的第二存储元件; 以及通过将存储在第二存储元件中的亮度值传送到第一存储元件来改变像素的亮度值的开关元件。
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4.发明申请Structure having light modulating film and light control device using the same 失效具有光调制膜的结构和使用其的光控制装置公开(公告)号：US20060138451A1
公开(公告)日：2006-06-29
申请号：US11346833
申请日：2006-02-03
IPC分类号： H01L31/111
CPC分类号： G02F1/0551 , G02F1/0027 , G02F1/055 , G02F2202/42
摘要： A structure includes a substrate and a light modulating film formed on top of the substrate. The light modulating film is made of polycrystalline PLZT containing Pb, Zr, Ti, and La as constituent elements. The film has a La concentration in the range of 5 at % to 30 at %. The relative dielectric constant at a frequency of 1 MHz is higher than or equal to 1200.
摘要翻译： 一种结构包括基板和形成在基板顶部的光调制膜。 光调制膜由含有Pb，Zr，Ti和La的多晶PLZT构成。 该膜的La浓度范围为5at％至30at％。 1MHz频率下的相对介电常数高于或等于1200。
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公开(公告)号：US06674109B1
公开(公告)日：2004-01-06
申请号：US10070977
申请日：2002-03-13
IPC分类号： H01L2976
CPC分类号： H01L29/516 , H01L29/7881
摘要： An object of the invention is to decrease leakage current of a nonvolatile memory and to design improvement of memory characteristic thereof. The invention is characterized by comprising an FET of MFMIS structure having metal layer (M) and insulation layer (I) on boundary of a ferroelectrics and a semiconductor as a buffer layer, and further by letting an insulation barrier layer between a floating gate or a control gate and a ferroelectric layer.
摘要翻译： 本发明的一个目的是减少非易失性存储器的泄漏电流并设计其存储器特性的改进。 本发明的特征在于包括在铁电体的边界上具有金属层（M）和绝缘层（I）的MFMIS结构的FET作为缓冲层，并且还通过在浮动栅极或 控制栅极和铁电层。
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公开(公告)号：US6097058A
公开(公告)日：2000-08-01
申请号：US235714
申请日：1999-01-22
IPC分类号： H01L21/8247 , H01B3/12 , H01L21/8246 , H01L27/10 , H01L27/105 , H01L29/78 , H01L29/788 , H01L29/792
CPC分类号： H01L29/78391
摘要： A ferroelectric layer having a low dielectric constant which is used for a ferroelectric memory element is provided. Also, the ferroelectric layer having a high melting point used for the ferroelectric memory element is provided. An FET 20 has a stacked structure including a gate oxidation layer 24, a floating gate 26, a ferroelectric layer 28, and a control gate 30 deposited on a channel region CH in that order, the channel region CH being formed in a semiconductor substrate 22 made of silicon. The ferroelectric layer 28 consists of a thin film made of a mixed crystal composed of Sr.sub.2 (Ta.sub.1-x Nb.sub.x).sub.2 O.sub.7. The crystal structure of both Sr.sub.2 Nb.sub.2 O.sub.7 and Sr.sub.2 Ta.sub.2 O.sub.7 is pyramid quadratic structure, and their lattice constants are similar to each other. Their relative dielectric constants are low, and their melting points are high. Curie temperature related with their ferroelectricity is, however, too high in Sr.sub.2 Nb.sub.2 O.sub.7 and too low in Sr.sub.2 Ta.sub.2 O.sub.7. In order to overcome the discrepancies, the ferroelectric layer 28 having desired curie temperature is formed with a mixed crystal made of Sr.sub.2 (Ta.sub.1-x Nbx).sub.2 O.sub.7.
摘要翻译： 提供了用于铁电存储元件的具有低介电常数的铁电层。 此外，提供了用于铁电存储元件的具有高熔点的铁电层。 FET20具有堆叠结构，该层叠结构包括依次形成在沟道区CH上的栅氧化层24，浮栅26，强电介质层28和控制栅极30，沟道区CH形成在半导体衬底22中 由硅制成 铁电层28由由Sr2（Ta1-xNbx）2O7构成的混合晶体构成的薄膜构成。 Sr2Nb2O7和Sr2Ta2O7的晶体结构是金字塔二次结构，其晶格常数相似。 它们的相对介电常数低，熔点高。 然而，与Sr2Nb2O7相比，其与铁电相关的居里温度太高，Sr2Ta2O7过低。 为了克服差异，具有希望的居里温度的铁电体层28由Sr2（Ta1-xNbx）2O7制成的混合晶体形成。
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7.发明授权Logical calculation circuit, logical calculation device, and logical calculation method 有权逻辑运算电路，逻辑运算装置及逻辑运算方法公开(公告)号：US07464131B2
公开(公告)日：2008-12-09
申请号：US10543356
申请日：2004-02-02
申请人： Michitaka Kameyama , Takahiro Hanyu , Hiromitsu Kimura , Yoshikazu Fujimori , Takashi Nakamura , Hidemi Takasu
发明人： Michitaka Kameyama , Takahiro Hanyu , Hiromitsu Kimura , Yoshikazu Fujimori , Takashi Nakamura , Hidemi Takasu
IPC分类号： G06G7/00
CPC分类号： G11C15/046 , G06F7/4824 , G06F7/5332 , G06F2207/3884
摘要： A logical calculation circuit capable of storing data, and performing logical calculations with high reliability and high speeds are provided. The residual polarized state s′ of a load ferroelectric capacitor Cs′ is actively changed so that the residual polarized state s′ of a load ferroelectric capacitor Cs′ is opposite to the residual polarized state s of a storage ferroelectric capacitor Cs. In the case a reference potential is made c=0 in the calculation operation, even if the second data to be calculated x=1 is given to the storage ferroelectric capacitor Cs in the residual polarized state s (the first data to be calculated)=0, the ferroelectric capacitor Cs does not reverse in polarity. Even with combinations other than s=0 and x=1, the ferroelectric capacitor Cs does not reverse in polarity. Difference is great between a potential VA=VA(0) occurring at a coupling node when x=1 is given to the ferroelectric capacitor Cs of s=0 and a potential VA=VA(1) occurring at the coupling node when x=1 is given to the ferroelectric capacitor Cs of s=1.
摘要翻译： 提供了能够存储数据并执行高可靠性和高速度的逻辑计算的逻辑计算电路。 积极地改变负载铁电电容器Cs'的残余极化状态s'，使得负载铁电电容器Cs'的残余极化状态s'与存储铁电电容器Cs的残留极化状态s相反。 在计算动作中，在c = 0的情况下，即使在剩余极化状态s（要计算的第一数据）s中的存储铁电电容器Cs给出要计算的第二数据x = 1的情况下， 0时，铁电电容器Cs的极性不反转。 即使使用s = 0和x = 1以外的组合，铁电电容器Cs的极性也不会反转。 当x = 1时给出在s = 0的铁电电容器Cs和当x = 1时出现在耦合节点处的电位VA = VA（1），在耦合节点处发生的电位VA = VA（0）之间的差异很大 给予s = 1的铁电电容器Cs。
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公开(公告)号：US07450412B2
公开(公告)日：2008-11-11
申请号：US10502265
申请日：2003-01-22
申请人： Michitaka Kameyama , Takahiro Hanyu , Hiromitsu Kimura , Yoshikazu Fujimori , Takashi Nakamura , Hidemi Takasu
发明人： Michitaka Kameyama , Takahiro Hanyu , Hiromitsu Kimura , Yoshikazu Fujimori , Takashi Nakamura , Hidemi Takasu
IPC分类号： G11C11/00
CPC分类号： H03K19/185 , G11C7/1006 , G11C11/22 , G11C2207/104 , H03K19/16
摘要： To provide a logical operation circuit which can perform a logical operation using a ferroelectric capacitor and a logical operation method. A logical operation circuit 1 has a ferroelectric capacitors CF and a transistor MP. The ferroelectric capacitor CF can retain a polarization state P1 (y=1) or P2 (y=0) corresponding to first operation target data y. In an operation process, a first terminal 3 of the ferroelectric capacitor 1 is precharged to a source potential Vdd, and a potential corresponding to second operation target data x, that is, a ground potential GND (x=1) or the source potential Vdd (x=0), is given to a second terminal 5 of the ferroelectric capacitor via a bit line BL. When the threshold voltage Vth of the transistor MP is set properly, the transistor MP becomes on or off (on, on, on, off) depending on the combination of x and y (0-0, 0-1, 1-0, 1-1).
摘要翻译： 提供可以使用铁电电容器进行逻辑运算的逻辑运算电路和逻辑运算方法。 逻辑运算电路1具有铁电电容器CF和晶体管MP。 铁电电容器CF可以保持对应于第一操作目标数据y的偏振状态P 1（y = 1）或P 2（y = 0）。 在操作过程中，强电介质电容器1的第一端子3被预充电到源极电位Vdd，并且对应于第二操作目标数据x的电位，即接地电位GND（x = 1）或源极电位Vdd （x = 0）经由位线BL被提供给铁电电容器的第二端子5。 当晶体管MP的阈值电压Vth被适当地设定时，晶体管MP根据x和y的组合（0-0,0-1,1-0，...）导通或截止（导通，导通，截止） 1-1）。
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公开(公告)号：US20050146922A1
公开(公告)日：2005-07-07
申请号：US10502265
申请日：2003-01-22
申请人： Michitaka Kameyama , Takahiro Hanyu , Hiromitsu Kimura , Yoshikazu Fujimori , Takashi Nakamura , Hidemi Takasu
发明人： Michitaka Kameyama , Takahiro Hanyu , Hiromitsu Kimura , Yoshikazu Fujimori , Takashi Nakamura , Hidemi Takasu
CPC分类号： H03K19/185 , G11C7/1006 , G11C11/22 , G11C2207/104 , H03K19/16
摘要： To provide a logical operation circuit which can perform a logical operation using a ferroelectric capacitor and a logical operation method. A logical operation circuit 1 has a ferroelectric capacitors CF and a transistor MP. The ferroelectric capacitor CF can retain a polarization state P1 (y=1) or P2 (y=0) corresponding to first operation target data y. In an operation process, a first terminal 3 of the ferroelectric capacitor 1 is precharged to a source potential Vdd, and a potential corresponding to second operation target data x, that is, a ground potential GND (x=1) or the source potential Vdd (x=0), is given to a second terminal 5 of the ferroelectric capacitor via a bit line BL. When the threshold voltage Vth of the transistor MP is set properly, the transistor MP becomes on or off (on, on, on, off) depending on the combination of x and y (0-0, 0-1, 1-0, 1-1).
摘要翻译： 提供可以使用铁电电容器进行逻辑运算的逻辑运算电路和逻辑运算方法。 逻辑运算电路1具有铁电电容器CF和晶体管MP。 铁电电容器CF可以保持对应于第一操作目标数据y的偏振状态P 1（y = 1）或P2（y = 0）。 在操作过程中，强电介质电容器1的第一端子3被预充电到源极电位Vdd，并且对应于第二操作目标数据x的电位，即接地电位GND（x = 1）或源极电位Vdd （x = 0）经由位线BL被提供给铁电电容器的第二端子5。 当晶体管MP的阈值电压Vth被适当地设定时，晶体管MP根据x和y的组合（0-0,0-1,1-0，...）导通或截止（导通，导通，截止） 1-1）。
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10.发明授权Method of forming solid of a ferroelectric or high dielectric material and method of manufacturing semiconductor device employing the same 有权形成铁电体或高介电材料的固体的方法和使用该方法的半导体器件的制造方法公开(公告)号：US06730522B1
公开(公告)日：2004-05-04
申请号：US09856818
申请日：2001-05-25
IPC分类号： H01L2100
CPC分类号： H01L21/02318 , C01G1/02 , C01G25/006 , C01G35/006 , C01P2004/80 , C01P2006/40 , C23C18/14 , H01L21/02197 , H01L21/02282 , H01L21/02337 , H01L21/02348 , H01L21/3105 , H01L21/31691
摘要： A method of forming a more satisfactory inorganic compound solid (ferroelectric film or the like) out of organic compound materials containing metal elements by annealing at a relatively low temperature. In order to form a ferroelectric film, a solution of organic compound materials containing metal elements is coated over a semiconductor substrate (S41) and dried (S42), after which precalcining is carried out (S43). After this process is repeated until a predetermined film thickness is achieved, organic substance removing treatment is carried out (S45). The organic substance removing treatment is carried out by, for example, heat treatment (approximately at 550° C.) in a low-pressure atmosphere (approximately at 50 Torr). Post calcining is carried out to inorganic compound materials obtained by the organic substance removing treatment (S46). The post calcining is carried out at a temperature of approximately 550° C., for example, whereby the inorganic compound materials are crystallized.
摘要翻译： 通过在较低温度下进行退火，从含有金属元素的有机化合物中形成更令人满意的无机化合物固体（铁电体膜等）的方法。 为了形成铁电体膜，在半导体基板（S41）上涂布含有金属元素的有机化合物的溶液，干燥（S42），之后进行预分解（S43）。 在重复该过程直到达到预定的膜厚度之后，进行有机物去除处理（S45）。 有机物去除处理通过例如在低压气氛（大约在50乇）下的热处理（约550℃）进行。 对通过有机物去除处理得到的无机复合材料进行后煅烧（S46）。 后煅烧在约550℃的温度下进行，例如无机化合物材料结晶。
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