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公开(公告)号：US20240111148A1
公开(公告)日：2024-04-04
申请号：US18537100
申请日：2023-12-12
发明人： Tiansheng ZHOU
CPC分类号： G02B26/085 , B81C1/00603 , G02B26/0841 , B81B2201/033 , B81B2201/042 , B81B2203/0136
摘要： A micromirror which comprises a mirror pivotally attached to a mount by a first pivoting structure that permits pivotal movement of the mirror relative to the mount about a first axis; a first comb drive which has a first position fixed relative to the mirror and second portion fixed relative to the mount. The first comb drive being for actuating the mirror about the first axis. A weight connected to the mirror, and the weight and mirror being on opposite sides of a fulcrum of the first pivoting structure. The first axis is non-parallel to a longitudinal axis extending through the weight and the mirror.
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公开(公告)号：US09969615B2
公开(公告)日：2018-05-15
申请号：US15147233
申请日：2016-05-05
发明人： Antti Iihola , Altti Torkkeli
IPC分类号： H01L21/00 , B81C1/00 , G01C19/5733 , G01C19/5769
CPC分类号： B81C1/00595 , B81B2201/0235 , B81B2201/0242 , B81B2201/033 , B81B2203/0136 , B81C1/00603 , G01C19/56 , G01C19/5733 , G01C19/5769
摘要： A method for manufacturing a micromechanical device layer is performed on a device wafer comprising a single layer of homogenous material. The method comprises patterning a first mask on a first face of the device wafer, the first mask patterning at least lateral dimensions of comb structures and outlines of large device structures. First trenches are etched, the first trenches defining the lateral dimensions of the at least comb structures and outlines of large device structures in a single deep etching process. Recession etching may be used on one or two faces of the device wafer for creating structures at least partially recessed below the respective surfaces of the device wafer. A double mask etching process may be used on one or two faces of the device wafer for creating structures at least partially recessed to mutually varying depths from the respective face of the device wafer.
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公开(公告)号：US09611142B2
公开(公告)日：2017-04-04
申请号：US15077188
申请日：2016-03-22
发明人： Yasuyuki Hirata , Gen Matsuoka
CPC分类号： B81C1/00492 , B81B3/0086 , B81B2201/042 , B81B2203/0136 , B81C1/00404 , B81C1/00603 , B81C2201/0102 , B81C2201/0132 , B81C2201/0198 , G02B26/0841
摘要： At the first etching step of etching an SOI substrate from a first silicon layer side, a portion of a first structure formed of the first silicon layer is formed as a pre-structure having a larger shape than a final shape. At the mask formation step of forming a final mask on a second silicon layer side of the SOI substrate, a first mask corresponding to the final shape of the first structure is formed in the pre-structure. At the second etching step of etching the SOI substrate from the second silicon layer side, the second silicon layer and the pre-structure are, using the first mask, etched to form the final shape of the first structure.
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公开(公告)号：US20160200569A1
公开(公告)日：2016-07-14
申请号：US15077188
申请日：2016-03-22
发明人： Yasuyuki HIRATA , Gen MATSUOKA
IPC分类号： B81C1/00
CPC分类号： B81C1/00492 , B81B3/0086 , B81B2201/042 , B81B2203/0136 , B81C1/00404 , B81C1/00603 , B81C2201/0102 , B81C2201/0132 , B81C2201/0198 , G02B26/0841
摘要： At the first etching step of etching an SOI substrate from a first silicon layer side, a portion of a first structure formed of the first silicon layer is formed as a pre-structure having a larger shape than a final shape. At the mask formation step of forming a final mask on a second silicon layer side of the SOI substrate, a first mask corresponding to the final shape of the first structure is formed in the pre-structure. At the second etching step of etching the SOI substrate from the second silicon layer side, the second silicon layer and the pre-structure are, using the first mask, etched to form the final shape of the first structure.
摘要翻译： 在从第一硅层侧蚀刻SOI衬底的第一蚀刻步骤中，由第一硅层形成的第一结构的一部分形成为具有比最终形状更大的形状的预结构。 在SOI衬底的第二硅层侧形成最终掩模的掩模形成步骤中，在预结构中形成对应于第一结构的最终形状的第一掩模。 在从第二硅层侧蚀刻SOI衬底的第二蚀刻步骤中，使用第一掩模蚀刻第二硅层和预制结构以形成第一结构的最终形状。
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公开(公告)号：US07566574B2
公开(公告)日：2009-07-28
申请号：US11850678
申请日：2007-09-06
申请人： Chen-Hsiung Yang
发明人： Chen-Hsiung Yang
IPC分类号： H01L21/00
CPC分类号： H01L21/2007 , B81B2203/0127 , B81C1/00603 , B81C2201/019
摘要： A method of performing a double-sided process is provided. First, a wafer having a structural pattern disposed on the front surface is provided. Following that, a plurality of front scribe lines are defined on the structural pattern, and a filling layer is filled into the front scribe lines. Subsequently, the structural pattern is bonded to a carrier wafer with a bonding layer, and a plurality of back scribe lines are defined on the back surface of the wafer. Finally, the filling layer filled in the front scribe lines is removed.
摘要翻译： 提供了一种执行双面处理的方法。 首先，提供具有布置在前表面上的结构图案的晶片。 接着，在结构图案上限定多个前划线，并将填充层填充到前划线中。 接着，用结合层将结构图形结合到载体晶片上，并且在晶片的背面形成多个后划线。 最后，去除填充在前划痕线中的填充层。
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公开(公告)号：US09902613B2
公开(公告)日：2018-02-27
申请号：US15315640
申请日：2015-08-19
发明人： Errong Jing
CPC分类号： B81C3/004 , B81C1/00 , B81C1/00603 , B81C3/00 , B81C2203/051 , G03F9/00 , H01L21/68
摘要： A positioning method in a microprocessing process of bulk silicon comprises the steps of: fabricating, on a first surface of a first substrate (10), a first pattern (100), a stepper photo-etching machine alignment mark (200) for positioning the first pattern, and a double-sided photo-etching machine first alignment mark (300) for positioning the stepper photo-etching machine alignment mark; fabricating, on a second surface, opposite to the first surface, of the first substrate, a double-sided photo-etching machine second alignment mark (400) corresponding to the double-sided photo-etching machine first alignment mark; bonding a second substrate (20) on the first surface of the first substrate; performing thinning on a first surface of the second substrate; fabricating, on the first surface of the second substrate, a double-sided photo-etching machine third alignment mark (500) corresponding to the double-sided photo-etching machine second alignment mark; and finding, on the first surface of the second substrate by using the double-sided photo-etching machine third alignment mark, a corresponding position of the stepper photo-etching machine alignment mark.
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公开(公告)号：US20160332872A1
公开(公告)日：2016-11-17
申请号：US15147233
申请日：2016-05-05
发明人： Antti IIHOLA , Altti TORKKELI
IPC分类号： B81C1/00
CPC分类号： B81C1/00595 , B81B2201/0235 , B81B2201/0242 , B81B2201/033 , B81B2203/0136 , B81C1/00603 , G01C19/56 , G01C19/5733 , G01C19/5769
摘要： A method for manufacturing a micromechanical device layer is performed on a device wafer comprising a single layer of homogenous material. The method comprises patterning a first mask on a first face of the device wafer, the first mask patterning at least lateral dimensions of comb structures and outlines of large device structures. First trenches are etched, the first trenches defining the lateral dimensions of the at least comb structures and outlines of large device structures in a single deep etching process. Recession etching may be used on one or two faces of the device wafer for creating structures at least partially recessed below the respective surfaces of the device wafer. A double mask etching process may be used on one or two faces of the device wafer for creating structures at least partially recessed to mutually varying depths from the respective face of the device wafer.
摘要翻译： 在包括单层均质材料的器件晶片上进行微机械器件层的制造方法。 该方法包括在器件晶片的第一面上构图第一掩模，第一掩模至少构图梳状结构的横向尺寸和大型器件结构的轮廓。 蚀刻第一沟槽，第一沟槽在单个深刻蚀工艺中限定至少梳状结构的横向尺寸和大型器件结构的轮廓。 衰减蚀刻可以用在器件晶片的一个或两个面上，用于产生至少部分地凹入器件晶片的相应表面下方的结构。 可以在器件晶片的一个或两个面上使用双掩模蚀刻工艺，用于产生至少部分地凹陷到从器件晶片的相应面相互变化的深度的结构。
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公开(公告)号：US20120062973A1
公开(公告)日：2012-03-15
申请号：US13320828
申请日：2009-05-24
申请人： Moshe Medina , Pinchas Chaviv , Yaron Fein
发明人： Moshe Medina , Pinchas Chaviv , Yaron Fein
CPC分类号： G02B26/08 , B81C1/00603 , G02B26/0841 , H02N1/008
摘要： A MOEMS apparatus is provided for scanning an optical beam and a method for manufacturing it. The apparatus is formed from a double active layer silicon on insulator (DSOI) substrate that includes two active layers separated by an insulating layer, and comprises an electro-static comb drive that includes a stator formed in a first of the two active layers and a rotor formed in a second of the two active layers, and wherein the electro-static comb drive is operative to impart a tilting motion to a micro-mirror formed in the second active layer. The MOEMS apparatus is characterized in that: a) at least one of the distances created between a tooth belonging to the rotor and an adjacent tooth belonging to the stator is less than 7 μm; and the aspect ratio of the apparatus is higher than 1:20.
摘要翻译： 提供了用于扫描光束的MOEMS装置及其制造方法。 该装置由绝缘层双层有源层硅绝缘体（DSOI）衬底形成，其中包括由绝缘层隔开的两个有源层，并且包括静电梳状驱动器，其包括形成在两个有源层中的第一层中的定子和 转子形成在两个有源层中的第二个中，并且其中静电梳状驱动器可操作以向在第二有源层中形成的微镜提供倾斜运动。 MOEMS装置的特征在于：a）属于转子的齿和属于定子的相邻齿之间产生的距离中的至少一个小于7μm; 并且装置的纵横比高于1:20。
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公开(公告)号：US07611960B2
公开(公告)日：2009-11-03
申请号：US11409582
申请日：2006-04-24
申请人： Sheng-Chieh Liu , Chia-Hung Kao , Tzu-Yang Wu , Sheng-Liang Pan , Yuan-Bang Lee
发明人： Sheng-Chieh Liu , Chia-Hung Kao , Tzu-Yang Wu , Sheng-Liang Pan , Yuan-Bang Lee
IPC分类号： H01L21/76 , H01L21/302 , H01L21/461
CPC分类号： B81C1/00603
摘要： Disclosed is a method and a system for wafer backside alignment. A zero mark patterning on front side of a substrate. A plurality of layers are deposited on the front side of the substrate. The wafer is flipped over with backside of the substrate facing up, and a through wafer etching is performed from the backside to an etch stop layer deposited over the front side of the substrate.
摘要翻译： 公开了一种用于晶片背面对准的方法和系统。 在基板的正面上形成零标记。 多个层沉积在基板的正面上。 将晶片的背面朝上翻转，从背面到沉积在基板前侧的蚀刻停止层进行贯通晶片蚀刻。
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公开(公告)号：US07306955B2
公开(公告)日：2007-12-11
申请号：US11277350
申请日：2006-03-23
申请人： Chen-Hsiung Yang
发明人： Chen-Hsiung Yang
IPC分类号： H01L21/00
CPC分类号： H01L21/2007 , B81B2203/0127 , B81C1/00603 , B81C2201/019
摘要： A method of performing a double-sided process is provided. First, a wafer having a structural pattern disposed on the front surface is provided. Following that, a plurality of front scribe lines are defined on the structural pattern, and a filling layer is filled into the front scribe lines. Subsequently, the structural pattern is bonded to a carrier wafer with a bonding layer, and a plurality of back scribe lines are defined on the back surface of the wafer. Finally, the filling layer filled in the front scribe lines is removed.
摘要翻译： 提供了一种执行双面处理的方法。 首先，提供具有布置在前表面上的结构图案的晶片。 接着，在结构图案上限定多个前划线，并将填充层填充到前划线中。 接着，用结合层将结构图形结合到载体晶片上，并且在晶片的背面上形成多个后划痕线。 最后，去除填充在前划痕线中的填充层。
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