公开(公告)号：US09647640B2

公开(公告)日：2017-05-09

申请号：US14790448

申请日：2015-07-02

Applicant: ESS Technology, Inc.

Inventor： A. Martin Mallinson

IPC: G06F17/10 ,  H03H15/02

CPC classification number: H03H15/02

Abstract: A system and method is disclosed for placing some of the elements of a FIR filter into a high impedance state in certain situations. When it is detected that the signal to an impedance element is the same as the previous value, then the driver of that impedance element is “turned off” or goes into a high impedance state, so that no current flows through that impedance element, and it no longer contributes to the filter output. Alternatively, if the impedance elements are the same between two adjacent taps of the delay line, the driver of one of those impedance elements may be turned off or go into a high impedance state. The technique may be particularly useful in differential output filters. Turning off a driver effectively removes the attached impedance element from the filter and reduces current flow and power consumption, thus extending battery life in mobile devices.

公开(公告)号：US09287851B2

公开(公告)日：2016-03-15

申请号：US13414487

申请日：2012-03-07

Applicant: A. Martin Mallinson ,  Hu Jing Yao ,  Dustin Forman

Inventor： A. Martin Mallinson ,  Hu Jing Yao ,  Dustin Forman

IPC: G06F17/50 ,  H03H15/02

CPC classification number: G06F17/5009 ,  H03H15/02 ,  H03K5/15 ,  H03K5/1536

Abstract: A method and system for designing and implementing a finite impulse response (FIR) filter to create a plurality of output signals, each output signal having the same frequency but at a different phase shift from the other output(s), is described. Values are determined for the resistors, or other elements having impedance values, in a FIR filter having a plurality of outputs, such that each output has the same frequency response but a different phase than the other output(s). This is accomplished by the inclusion of a phase factor in the time domain calculation of the resistor values that does not change the response in the frequency domain. The phase shift is constant and independent of the frequency of the output signal.

Abstract translation: 描述了一种用于设计和实现有限脉冲响应（FIR）滤波器以产生多个输出信号的方法和系统，每个输出信号具有相同的频率但与另一个输出具有不同的相移。 在具有多个输出的FIR滤波器中，确定具有阻抗值的电阻器或其他元件的值，使得每个输出具有与其它输出相同的频率响应但不同的相位。 这是通过在不改变频域响应的电阻值的时域计算中包括相位因子来实现的。 相移是恒定的，与输出信号的频率无关。

公开(公告)号：US20150381146A1

公开(公告)日：2015-12-31

申请号：US14269647

申请日：2014-05-05

Applicant: ANALOG DEVICES, INC.

Inventor： Eric Nestler ,  Jeffrey Venuti ,  Vladimir Zlatkovic ,  Kartik Nanda

IPC: H03H15/02

CPC classification number: H03H15/02 ,  G01D5/24 ,  G01R27/2605 ,  G01R31/028 ,  G06F17/14 ,  G06G7/19

Abstract: An approach to time domain filtering uses a passive charge sharing approach to implement an infinite impulse response filter. Delayed samples of an input signal are stored as charges on capacitors of a first array of capacitors, and delayed samples of the output signal are stored as charges on capacitors of a second array of capacitors. Outputs are determined by passively coupling capacitors of the first and second arrays to one another, and determining the output according to a total charge on the coupled capacitors. In some examples, a gain is applied to the total charge prior to storing the output on the second array of capacitors. In some examples, a charge scaling circuit is applied to the charges stored on the arrays prior to coupling capacitors to form the output.

Abstract translation: 时域滤波方法采用无源电荷共享方式来实现无限脉冲响应滤波器。 将输入信号的延迟样本作为电荷存储在第一电容器阵列的电容器上，并且输出信号的延迟采样作为电荷存储在第二电容器阵列的电容器上。 输出由第一和第二阵列的电容器彼此无源耦合确定，并根据耦合的电容器上的总电荷来确定输出。 在一些示例中，在将输出存储在第二电容器阵列之前，对总电荷施加增益。 在一些示例中，在耦合电容器之前，将电荷量化电路应用于存储在阵列上的电荷以形成输出。

公开(公告)号：US20050114428A1

公开(公告)日：2005-05-26

申请号：US10724443

申请日：2003-11-26

Applicant: Debanjan Mukherjee ,  Jishnu Bhattacharjee ,  Qian Yu ,  Abhijit Phanse

Inventor： Debanjan Mukherjee ,  Jishnu Bhattacharjee ,  Qian Yu ,  Abhijit Phanse

IPC: G06F17/10 ,  H03H11/26 ,  H03H15/02 ,  H04L25/03

CPC classification number: H03F3/45183 ,  H03F2203/45634 ,  H03F2203/45638 ,  H03H11/265 ,  H03H15/02 ,  H04L2025/03477 ,  H04L2025/03617

Abstract: Systems and methods provide analog delay elements, which may be utilized in isolation or in a cascade. For example, a delay element may include a broadband amplifier and a passive, programmable filter, which may provide a desired magnitude and group delay response over a wide frequency range while being tolerant of process variations.

Abstract translation: 系统和方法提供模拟延迟元件，其可以在隔离或级联中使用。 例如，延迟元件可以包括宽带放大器和无源可编程滤波器，其可以在宽的频率范围内提供期望的幅度和组延迟响应，同时容忍工艺变化。

公开(公告)号：US4849662A

公开(公告)日：1989-07-18

申请号：US851805

申请日：1986-04-14

Applicant: Douglas R. Holberg ,  Eric J. Swanson

Inventor： Douglas R. Holberg ,  Eric J. Swanson

IPC: H03H19/00 ,  H03H15/02 ,  H03H9/64

CPC classification number: H03H19/00

Abstract: A method and circuitry for time-sharing a digitally-programmable capacitive element, particularly in conjunction with a switched-capacitor filter circuit. The method includes: selecting a first capacitance value for the capacitive element; initializing the charge on the capacitive element; connecting the capacitive element to first preselected nodes of an electronic circuit; disconnecting the capacitive element from the first preselected nodes of after any charge transfer has substantially been completed; changing the capacitance of the capacitive element to a new desired value; initializing the charge on the capacitive element; and then connecting the capacitive element to other preselected nodes of the electronic circuit. A biquad switched-capacitor filter circuit is configured to use such method in its operation.

公开(公告)号：US4612521A

公开(公告)日：1986-09-16

申请号：US710826

申请日：1985-03-12

Applicant: Marcus Kleefstra ,  Antonius J. M. Montagne ,  Jan W. Pathuis

Inventor： Marcus Kleefstra ,  Antonius J. M. Montagne ,  Jan W. Pathuis

IPC: G05F3/22 ,  H01L29/765 ,  H03H15/02 ,  H03K5/153

CPC classification number: G05F3/225 ,  H01L29/765 ,  H03H15/023

Abstract: The invention relates to a charged-coupled transversal filter of the parallel-in series-out (PISO) type having a buried channel of one conductivity type and zones diffused into the channel of the other conductivity type, which zones constitute the clock electrodes. The inputs also comprise a zone of the one conductivity type which is provided in the associated zone of the second conductivity type. The weighting factors are formed by selecting the sizes of these zones, which constitute the emitters of bipolar transistors, whose bases are constituted by the clock electrodes and whose collectors are constituted by the channel. The signal to be filtered is introduced by first converting the signal into a current and by then distributing the latter over the various emitters. Stages having positive and negative weighting factors can be readily combined to form a CCD.

Abstract translation: 本发明涉及一种并联串联（PISO）型的带电耦合横向滤波器，其具有一个导电类型的掩埋沟道和扩散到另一导电类型的沟道中的区域，这些区域构成时钟电极。 输入还包括设置在第二导电类型的相关区域中的一种导电类型的区域。 通过选择构成双极晶体管的发射极的这些区域的尺寸形成加权系数，双极晶体管的基极由时钟电极构成，其集电极由沟道构成。 通过首先将信号转换为电流并随后将其分配在各种发射器上来引入要滤波的信号。 具有正和负加权因子的阶段可以容易地组合以形成CCD。

公开(公告)号：US4562417A

公开(公告)日：1985-12-31

申请号：US485214

申请日：1983-04-15

Applicant: Gerard Beal ,  Jean-Louis Coutures

Inventor： Gerard Beal ,  Jean-Louis Coutures

IPC: G11C27/04 ,  H03H15/02 ,  H03H9/70 ,  H01L29/78

CPC classification number: G11C27/04 ,  H03H15/02

Abstract: In this transverse charge transfer filter having N MOS capacitors arranged on the same semiconductor substrate and provided with electrodes, the electrode of every other MOS capacitor has its ends covered by the ends of the electrodes of two adjacent MOS capacitors, the N MOS capacitors being arranged in n rows and the charge transfer direction in two adjacent rows being opposite, which makes it possible to compensate for the effects of the displacements of the masks used for manufacturing the transverse charge transfer filters.

Abstract translation: 在具有布置在同一半导体衬底上并具有电极的N个MOS电容器的横向电荷转移滤波器中，每隔一个MOS电容器的电极的端部由两个相邻的MOS电容器的电极的端部覆盖，N个MOS电容器被布置 在n行中并且两个相邻行中的电荷转移方向相反，这使得可以补偿用于制造横向电荷转移滤波器的掩模的位移的影响。

公开(公告)号：US4531225A

公开(公告)日：1985-07-23

申请号：US332241

申请日：1981-12-18

Applicant: Osamu Ohtsuki

Inventor： Osamu Ohtsuki

IPC: H01L27/148 ,  H01L29/10 ,  H01L29/768 ,  G11C19/28 ,  H01L29/78 ,  H03H15/02

CPC classification number: H01L29/1062 ,  H01L27/14825 ,  H01L29/76866

Abstract: A charge coupled device has a meandering charge path formed by a channel stop of unique shape. The channel stop is of interdigitated pattern, and the gate electrodes form a straight strip. The channel stop pattern and an asymmetric depletion layer formed within the channel cause the transfer of the charge through the channel via the meandering charge path. A transversal filter and imaging device are readily provided by extracting the signal from one or both sides of the channel.

Abstract translation: 电荷耦合器件具有通过独特形状的通道停止形成的曲折电荷路径。 通道停止是叉指式，栅电极形成一条直条。 通道停止模式和在通道内形成的不对称耗尽层导致电荷经由蜿蜒充电路径通过通道的转移。 通过从信道的一侧或两侧提取信号，容易提供横向滤波器和成像装置。

公开(公告)号：US4528684A

公开(公告)日：1985-07-09

申请号：US516457

申请日：1983-07-22

Applicant: Tetsuya Iida ,  Tatsuo Sakaue

Inventor： Tetsuya Iida ,  Tatsuo Sakaue

IPC: G11C27/04 ,  H01L21/339 ,  H01L29/762 ,  H03H15/02 ,  H04N5/335 ,  H04N5/341 ,  H04N5/372 ,  H04N5/374 ,  H04N5/378 ,  G11C19/28 ,  G11C27/00

CPC classification number: G11C27/04 ,  H03H15/02

Abstract: A circuit for obtaining an output from a CCD type signal processing circuit should operate satisfactorily in a high frequency band covering, for instance, video signals. For this purpose, the floating gate electrode of the CCD is connected to a first potential point through first and second capacitors. The connecting point of the floating gate electrode in the series circuit is connected to a second potential level through a first control switch which is driven by a reset clock pulse, and the connecting point of the first and second capacitors is connected to a third potential level through a second control switch which is driven by a reset clock pulse, so that the output is provided at the connecting point of the capacitors.

Abstract translation: 用于从CCD型信号处理电路获得输出的电路应当在覆盖例如视频信号的高频带中令人满意地工作。 为此，CCD的浮置栅极通过第一和第二电容器连接到第一电位点。 串联电路中的浮栅电极的连接点通过由复位时钟脉冲驱动的第一控制开关连接到第二电位电平，并且第一和第二电容器的连接点连接到第三电位电平 通过由复位时钟脉冲驱动的第二控制开关，使得输出被提供在电容器的连接点处。

公开(公告)号：US4525798A

公开(公告)日：1985-06-25

申请号：US402569

申请日：1982-07-28

Applicant: Jean-Claude Rebourg ,  Claude Despois

Inventor： Jean-Claude Rebourg ,  Claude Despois

IPC: G06G7/19 ,  G11C19/28 ,  G06G7/12 ,  H03H15/02

CPC classification number: G11C19/285 ,  G06G7/1907

Abstract: Hadamard transformer using charge transfer devices. The transformer comprises a charging register with at least N electrodes and doped bands making it possible to transfer the N samples charged in the charging register to the transformer calculating register.

Abstract translation: Hadamard变压器采用电荷转移装置。 变压器包括具有至少N个电极和掺杂带的充电寄存器，使得可以将充电寄存器中充电的N个采样传送到变压器计算寄存器。