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    Management circuitry for a least recently used memory management process
    91.
    发明授权
    Management circuitry for a least recently used memory management process 有权

    公开(公告)号：US12124379B2

    公开(公告)日：2024-10-22

    申请号：US17961473

    申请日：2022-10-06

    Applicant: Synopsys, Inc.

    Inventor： Karthik Thucanakkenpalayam Sundararajan

    IPC: G06F12/0891

    CPC classification number: G06F12/0891

    Abstract: A processing system employs a method to order the elements within a memory. Ordering the elements includes receiving an accessed memory element. The accessed memory element is requested by a processor from a memory. Further, the accessed memory element is compared to stored elements within the memory to generate control signals. Gate control signals from the control signals are generated. The order of the stored elements within the memory is updated based on the gate control signals.

    Register integrity check in configurable devices
    92.
    发明授权
    Register integrity check in configurable devices 有权

    公开(公告)号：US12124323B2

    公开(公告)日：2024-10-22

    申请号：US17883379

    申请日：2022-08-08

    Applicant: XILINX, INC.

    Inventor： Ahmad R. Ansari ,  David P. Schultz ,  Felix Burton ,  Jeffrey Cuppett

    IPC: G06F11/07 ,  G06F9/30

    CPC classification number: G06F11/0763 ,  G06F9/30101 ,  G06F11/0772

    Abstract: Embodiments herein describe integrity check techniques that are efficient and flexible by using local registers in a segment to store check values which can be used to detect errors in the local configuration data in the same segment. In addition to containing local registers storing the check values, each segment can include a mask register indicated which of the configuration registers should be checked and which can be ignored. Further, the segments can include a next segment register indicating the next segment the check engine should evaluate for errors.

    Aluminum-reinforced vehicle frame
    94.
    发明授权
    Aluminum-reinforced vehicle frame 有权

    公开(公告)号：US12122459B2

    公开(公告)日：2024-10-22

    申请号：US17128256

    申请日：2020-12-21

    Applicant: Rivian IP Holdings, LLC

    Inventor： Akshat Chauhan

    IPC: B62D29/00 ,  B62D21/00 ,  B62D65/02

    CPC classification number: B62D29/008 ,  B62D21/00 ,  B62D65/02

    Abstract: Disclosed embodiments include apparatuses, vehicles, and methods for providing a frame insert insertable between sections of a structural frame to provide lateral stiffness to resist deformation of the structural frame. In an illustrative embodiment, an apparatus includes a frame insert configured to be received between sections of a structural frame. The frame insert includes a body of extruded material having opposing ends. Each of the opposing ends is configured to engage an inner face of one of the sections of the structural frame. A plurality of transverse ribs extends between the opposing ends. The plurality of transverse ribs is configured to provide support to the structural frame.

    Descending etching resistance in advanced substrate patterning
    96.
    发明授权
    Descending etching resistance in advanced substrate patterning 有权

    公开(公告)号：US12120925B2

    公开(公告)日：2024-10-15

    申请号：US18301805

    申请日：2023-04-17

    Applicant: Applied Materials, Inc.

    Inventor： Chung-chia Chen ,  Ji Young Choung ,  Dieter Haas ,  Yu-hsin Lin ,  Jungmin Lee ,  Wen-Hao Wu ,  Si Kyoung Kim

    IPC: H10K59/122 ,  H10K50/844 ,  H10K71/00 ,  H10K102/00

    CPC classification number: H10K59/122 ,  H10K50/844 ,  H10K71/00 ,  H10K2102/00

    Abstract: Embodiments described herein relate to a device comprising a substrate, a pixel-defining layer (PDL) structures disposed over the substrate and defining sub-pixels of the device, and a plurality overhang structures. Each overhang structure is defined by a top structure extending laterally past a body structure. Each body structure is disposed over an upper surface of each PDL structure. Overhang structures define a plurality of sub-pixels including a first sub-pixel and a second sub-pixel. Each sub-pixel includes an anode, an organic light-emitting diode (OLED) material, a cathode, and an encapsulation layer. The OLED materials are disposed over the first anode and extends under the overhang structures. The cathodes are disposed over the OLED materials and under the overhang structures. The encapsulation layers are disposed over the first cathode. The first encapsulation layer has a first thickness and the second encapsulation layer has a second thickness different from the first thickness.

    DRAM-less SSD with HMB cache management
    99.
    发明授权
    DRAM-less SSD with HMB cache management 有权

    公开(公告)号：US12118242B2

    公开(公告)日：2024-10-15

    申请号：US17657456

    申请日：2022-03-31

    Applicant: Western Digital Technologies, Inc.

    Inventor： Judah Gamliel Hahn ,  Shay Benisty ,  Ariel Navon

    IPC: G06F3/06

    CPC classification number: G06F3/0659 ,  G06F3/0604 ,  G06F3/0656 ,  G06F3/0679

    Abstract: The present disclosure generally relates to host memory buffer (HMB) cache management in DRAM-less SSDs. HMB is transient memory and may not always be available. For example, when the link between the data storage device and the host device is not active, the data storage device can't access the HMB. Placing an HMB log in the HMB controller that is disposed in the data storage device provides access to data that would otherwise be inaccessible in the HMB. The HMB log contains any deltas that have occurred since either the last copying to an HMB cache in the memory device or any delta that have occurred since the link became inactive. The HMB cache mirrors the HMB. In so doing, the data of the HMB is available to the data storage device not only when the link is active, but also when the link is not active.

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