公开(公告)号：US20060156115A1

公开(公告)日：2006-07-13

申请号：US11311380

申请日：2005-12-20

申请人： Jin-hee Kim ,  Lye-suk Lee

发明人： Jin-hee Kim ,  Lye-suk Lee

IPC分类号： G01R31/28

CPC分类号： H04L41/06

摘要： A device, a system, and a method for displaying error information within an expandable Home Theater (XHT) network, and more particularly, to a device, a system, and a method for providing error information within the XHT network by displaying error information of slave devices in the XHT network to a user through a master device having a display function are provided. The system providing error information within an XHT network upon a user's request for device error information of a slave device connected to a master device through a communication control line within the XHT network, the system including a master device requesting error information from the slave device connected through the XHT network, and a slave device transmitting the error information to the master device.

摘要翻译： 一种用于在可扩展家庭影院（XHT）网络内显示错误信息的装置，系统和方法，更具体地说，涉及通过显示XHT网络中的错误信息来提供XHT网络内的错误信息的装置，系统和方法 提供了通过具有显示功能的主设备向用户提供XHT网络中的从设备。 所述系统在用户通过所述XHT网络中的通信控制线路连接到主设备的从设备的设备请求之后提供XHT网络内的错误信息，所述系统包括从连接的从设备请求错误信息的主设备 通过XHT网络和从设备向主设备发送错误信息。

公开(公告)号：US07045424B2

公开(公告)日：2006-05-16

申请号：US10903967

申请日：2004-07-30

申请人： Ki-Chul Kim ,  Jin-Hee Kim ,  Sung-Ho Kim ,  Geum-Jong Bae

发明人： Ki-Chul Kim ,  Jin-Hee Kim ,  Sung-Ho Kim ,  Geum-Jong Bae

IPC分类号： H01L29/336 ,  H01L29/3205 ,  H01L29/4763 ,  H01L29/302

CPC分类号： H01L27/11568 ,  H01L21/28273 ,  H01L27/115 ,  H01L29/792

摘要： There is provided a method of fabricating a local SONOS type gate structure and a method of fabricating a nonvolatile memory cell having the same. The method includes forming a gate dielectric layer on a semiconductor substrate. A gate pattern, including a gate electrode and a hard mask layer pattern which are sequentially stacked, is formed on the gate dielectric layer. Then, a recess is formed on the boundary of the gate pattern and the gate dielectric layer. The recess is formed on one side wall of the gate pattern, and is prevented from forming on the other side wall of the gate pattern. A tunnel layer and a trapping dielectric layer are sequentially formed on substantially the entire surface of the semiconductor substrate having the recess formed thereon to fill the recess. At least a portion of the trapping dielectric layer is formed inside the recess.

摘要翻译： 提供了制造本地SONOS型栅极结构的方法以及制造具有该栅极结构的非易失性存储单元的方法。 该方法包括在半导体衬底上形成栅极电介质层。 在栅极电介质层上形成包括依次层叠的栅电极和硬掩模层图案的栅极图案。 然后，在栅极图案和栅极介电层的边界上形成凹部。 凹部形成在栅极图案的一个侧壁上，并且防止在栅极图案的另一个侧壁上形成。 隧道层和俘获电介质层依次形成在其上形成有凹部的半导体衬底的基本上整个表面上以填充凹部。 在凹陷内部形成有至少一部分捕获电介质层。

公开(公告)号：US20060078792A1

公开(公告)日：2006-04-13

申请号：US11239691

申请日：2005-09-30

申请人： Jin-Hee Kim ,  Jin-Sung Kim

发明人： Jin-Hee Kim ,  Jin-Sung Kim

IPC分类号： H01M10/40

CPC分类号： H01M10/4235 ,  H01M6/164 ,  H01M10/0525 ,  H01M10/0567 ,  H01M10/0569 ,  H01M2300/0025

摘要： An electrolyte includes a lithium salt, a non-aqueous organic solvent, gamma-butyrolactone and halogenated toluene represented by the following formula 1: wherein X represents at least one element selected from the group consisting of F, Cl, Br and I, and n represents an integer of 1 to 5. The lithium ion secondary battery including the electrolyte provides improved safety under overcharge and high-temperature storage conditions.

摘要翻译： 电解质包括锂盐，非水有机溶剂，γ-丁内酯和由下式1表示的卤化甲苯：其中X表示选自F，Cl，Br和I中的至少一种元素，n表示n 表示1〜5的整数。包含电解质的锂离子二次电池在过充电和高温储存条件下提供了改进的安全性。

公开(公告)号：US20060035432A1

公开(公告)日：2006-02-16

申请号：US11146501

申请日：2005-06-07

申请人： Sang-Su Kim ,  Geum-Jong Bae ,  In-Wook Cho ,  Jin-Hee Kim

发明人： Sang-Su Kim ,  Geum-Jong Bae ,  In-Wook Cho ,  Jin-Hee Kim

IPC分类号： H01L21/8238

CPC分类号： H01L27/11568 ,  H01L27/105 ,  H01L27/11573 ,  Y10S438/954

摘要： in methods of fabricating a non-volatile memory device having a local silicon-oxide-nitride-oxide-silicon (SONOS) gate structure, a semiconductor substrate having a cell transistor area, a high voltage transistor area, and a low voltage transistor area, is prepared. At least one memory storage pattern defining a cell gate insulating area on the semiconductor substrate within the cell transistor area is formed. An oxidation barrier layer is formed on the semiconductor substrate within the cell gate insulating area. A lower gate insulating layer is formed on the semiconductor substrate within the high voltage transistor area. A conformal upper insulating layer is formed on the memory storage pattern, the oxidation barrier layer, and the lower gate insulating layer. A low voltage gate insulating layer having a thickness which is less than a combined thickness of the upper insulating layer and the lower gate insulating layer is formed on the semiconductor substrate within the low voltage transistor area.

摘要翻译： 在制造具有局部氧化硅 - 氮化物 - 氧化物 - 硅（SONOS）栅极结构的非易失性存储器件的方法中，具有单元晶体管区域，高压晶体管区域和低压晶体管区域的半导体衬底， 准备好了 形成在单元晶体管区域内的半导体衬底上限定单元栅极绝缘区域的至少一个存储器存储图案。 在单元栅极绝缘区域内的半导体衬底上形成氧化阻挡层。 在高电压晶体管区域内的半导体衬底上形成下栅极绝缘层。 在存储器存储图案，氧化阻挡层和下栅极绝缘层上形成保形的上绝缘层。 在低压晶体管区域内的半导体衬底上形成厚度小于上绝缘层和下栅极绝缘层的组合厚度的低压栅极绝缘层。

公开(公告)号：US20060033152A1

公开(公告)日：2006-02-16

申请号：US11183614

申请日：2005-07-18

申请人： Ki-chul Kim ,  Geum-jong Bae ,  In-wook Cho ,  Byoung-jin Lee ,  Jin-hee Kim ,  Sang-su Kim

发明人： Ki-chul Kim ,  Geum-jong Bae ,  In-wook Cho ,  Byoung-jin Lee ,  Jin-hee Kim ,  Sang-su Kim

IPC分类号： H01L29/788

CPC分类号： H01L29/66833 ,  H01L21/28282 ,  H01L29/792

摘要： A non-volatile memory device having improved electrical characteristics and a method of fabricating the non-volatile memory device are provided. The non-volatile memory device includes a gate electrode, which is formed on a semiconductor substrate on which source and drain regions are formed, a trapping structure, which is interposed between the semiconductor substrate and the gate electrode and comprises an electron tunneling layer and a charge trapping layer, and an electron back-tunneling prevention layer, which is interposed between the gate electrode and the charge trapping layer, prevents electrons in the gate electrode from back-tunneling through the charge trapping layer, and is formed of a metal having a higher work function than the gate electrode.

公开(公告)号：US06998309B2

公开(公告)日：2006-02-14

申请号：US10786239

申请日：2004-02-24

申请人： In-Wook Cho ,  Nae-In Lee ,  Kwang-Wook Koh ,  Geum-Jong Bae ,  Sang-Su Kim ,  Jin-Hee Kim ,  Sung-Ho Kim ,  Ki-Chul Kim

发明人： In-Wook Cho ,  Nae-In Lee ,  Kwang-Wook Koh ,  Geum-Jong Bae ,  Sang-Su Kim ,  Jin-Hee Kim ,  Sung-Ho Kim ,  Ki-Chul Kim

IPC分类号： H01L21/336

CPC分类号： H01L27/115 ,  H01L27/11568 ,  Y10S438/954

摘要： A method of manufacturing a non-volatile semiconductor memory device begins by forming a dielectric layer pattern having an ONO composition on a substrate. A polysilicon layer is formed on the substrate including over the dielectric layer pattern. The polysilicon layer is patterned to form a split polysilicon layer pattern that exposes part of the dielectric layer pattern. The exposed dielectric layer is etched, and then impurities are implanted into portions of the substrate using the split polysilicon layer pattern as a mask to thereby form a source region having a vertical profile in the substrate.

摘要翻译： 制造非易失性半导体存储器件的方法是通过在衬底上形成具有ONO组成的电介质层图案而开始的。 在包括在电介质层图案上的衬底上形成多晶硅层。 图案化多晶硅层以形成暴露部分介电层图案的分裂多晶硅层图案。 暴露的电介质层被蚀刻，然后使用分离多晶硅层图案作为掩模将杂质注入到衬底的部分中，从而在衬底中形成具有垂直轮廓的源区。

公开(公告)号：US20050162925A1

公开(公告)日：2005-07-28

申请号：US11038726

申请日：2005-01-19

申请人： In-Wook Cho ,  Geum-Jong Bae ,  Ki-Chul Kim ,  Byoung-Jin Lee ,  Jin-Hee Kim ,  Byou-Ree Lim ,  Sang-Su Kim

发明人： In-Wook Cho ,  Geum-Jong Bae ,  Ki-Chul Kim ,  Byoung-Jin Lee ,  Jin-Hee Kim ,  Byou-Ree Lim ,  Sang-Su Kim

IPC分类号： G11C16/02 ,  G11C11/34 ,  G11C16/04 ,  G11C16/06 ,  G11C16/12 ,  H01L21/8247 ,  H01L27/115 ,  H01L29/423 ,  H01L29/788 ,  H01L29/792

CPC分类号： G11C16/0425 ,  H01L27/115 ,  H01L29/42324 ,  H01L29/7885

摘要： A nonvolatile memory cell array having common drain lines and method of operating the same are disclosed. A positive voltage is applied to a gate of a selected cell and gates of memory cells that share a word line with the selected cell. A first voltage is applied to a drain of the selected cell and drains of the memory cells that share at least a drain line with the selected cell. A second voltage is applied to a source of the selected cell and sources of memory cells that share a bit line with the selected cell, the second voltage being less than the first voltage, such that electrons are injected into the charge storage region of the selected cell to program. A third voltage, which is higher than the second voltage, is applied to bit lines that are not connected to the selected cell.

摘要翻译： 公开了一种具有共同漏极线的非易失性存储单元阵列及其操作方法。 将正电压施加到所选单元的栅极和与所选单元共享字线的存储单元的栅极。 将第一电压施加到所选择的单元的漏极和与所选择的单元共享至少漏极线的存储器单元的漏极。 第二电压被施加到所选择的单元的源和与所选择的单元共享位线的存储器单元的源，第二电压小于第一电压，使得电子被注入到所选择的单元的电荷存储区域中 单元格程序。 高于第二电压的第三电压被施加到未连接到所选择的单元的位线。

公开(公告)号：US20050047665A1

公开(公告)日：2005-03-03

申请号：US10924905

申请日：2004-08-25

申请人： Jin-Hee Kim

发明人： Jin-Hee Kim

IPC分类号： H04N19/50 ,  H03M7/36 ,  H04N19/102 ,  H04N19/139 ,  H04N19/14 ,  H04N19/44 ,  H04N19/503 ,  H04N19/513 ,  H04N19/80 ,  G06K9/36

CPC分类号： H04N19/186 ,  H04N19/20 ,  H04N19/543

摘要： A method of coding a compressed moving image including segmenting a local motion block from the compressed moving image, processing outer blocks of the local motion block, deciding a final contour of the local motion block from the processed outer blocks, and restoring colors inside the final contour.

摘要翻译： 一种编码压缩运动图像的方法，包括从压缩的运动图像中分割局部运动块，处理局部运动块的外块，从经处理的外块确定局部运动块的最终轮廓，以及在最终 轮廓。

公开(公告)号：US20050023604A1

公开(公告)日：2005-02-03

申请号：US10844783

申请日：2004-05-13

申请人： Sang-Su Kim ,  Kwang-Wook Koh ,  Geum-Jong Bae ,  Ki-Chul Kim ,  Sung-Ho Kim ,  Jin-Hee Kim ,  In-Wook Cho

发明人： Sang-Su Kim ,  Kwang-Wook Koh ,  Geum-Jong Bae ,  Ki-Chul Kim ,  Sung-Ho Kim ,  Jin-Hee Kim ,  In-Wook Cho

IPC分类号： H01L21/8234 ,  H01L21/8246 ,  H01L21/8247 ,  H01L27/105 ,  H01L27/115 ,  H01L21/336 ,  H01L21/8238 ,  H01L29/76 ,  H01L29/788

CPC分类号： H01L27/11568 ,  H01L21/823462 ,  H01L27/105 ,  H01L27/115 ,  H01L27/11526 ,  H01L27/11546

摘要： The present invention discloses a semiconductor device having a floating trap type nonvolatile memory cell and a method for manufacturing the same. The method includes providing a semiconductor substrate having a nonvolatile memory region, a first region, and a second region. A triple layer composed of a tunnel oxide layer, a charge storing layer and a first deposited oxide layer on the semiconductor substrate is formed sequentially. The triple layer on the semiconductor substrate except the nonvolatile memory region is then removed. A second deposited oxide layer is formed on an entire surface of the semiconductor substrate including the first and second regions from which the triple layer is removed. The second deposited oxide layer on the second region is removed, and a first thermal oxide layer is formed on the entire surface of the semiconductor substrate including the second region from which the second deposited oxide layer is removed. The semiconductor device can be manufactured according to the present invention to have a reduced processing time and a reduced change of impurity doping profile. The thickness of a blocking oxide layer and a high voltage gate oxide layer can be controlled.

摘要翻译： 本发明公开了一种具有浮动阱式非易失性存储单元的半导体器件及其制造方法。 该方法包括提供具有非易失性存储区域，第一区域和第二区域的半导体衬底。 顺序地形成由半导体衬底上的隧道氧化物层，电荷存储层和第一沉积氧化物层组成的三层。 然后除去非易失性存储区域之外的半导体衬底上的三层。 第二沉积氧化物层形成在半导体衬底的包括去除三层的第一和第二区域的整个表面上。 去除第二区域上的第二沉积氧化物层，并且在包括除去第二沉积氧化物层的第二区域的半导体衬底的整个表面上形成第一热氧化物层。 可以根据本发明制造半导体器件以减少处理时间和降低杂质掺杂分布的变化。 可以控制阻挡氧化物层和高电压栅极氧化物层的厚度。

公开(公告)号：US20050013314A1

公开(公告)日：2005-01-20

申请号：US10869434

申请日：2004-06-16

申请人： Se-Youn Lim ,  Jae-Yeon Song ,  Jin-Hee Kim ,  Seo-Won Kwon ,  Yoon-Sun Lee ,  Jong-Hwa Lee

发明人： Se-Youn Lim ,  Jae-Yeon Song ,  Jin-Hee Kim ,  Seo-Won Kwon ,  Yoon-Sun Lee ,  Jong-Hwa Lee

IPC分类号： H04L12/44 ,  H04L12/18 ,  H04Q11/00 ,  H04L12/28 ,  H04J1/00 ,  H04J3/26 ,  H04L12/56

CPC分类号： H04L12/185 ,  H04Q11/0066 ,  H04Q11/0067 ,  H04Q11/0071 ,  H04Q2011/0047 ,  H04Q2011/0064

摘要： A multicast transmission method in GEM mode in Gigabit-capable passive optical network and a method of processing frames. The multicast transmission method includes the steps of: (a) setting a multicast connection; and (b) transmitting multicast messages in a GEM mode, wherein said step (a) includes a first sub step (i), in which predetermined ONTs are registered to a multicast group by means of IGMP frames in the first step, and a second sub step (11), in which an OLT assigns a multicast port ID to the multicast group and the ONTs registered to the multicast group. In addition, step (b) includes a first substep (i), in which the OLT assigns a multicast port ID to a message transmitted from a router to the multicast group, and transmits the message, and a second sub-step (ii), in which an ONT, which belongs to the OLT, filters the message, to which the multicast port ID is assigned, by means of a port ID assigned to the ONT.

摘要翻译： 千兆位无源光网络中的GEM模式下的组播传输方法及处理帧的方法。 多播传输方法包括以下步骤：（a）设置组播连接; 以及（b）以GEM模式发送多播消息，其中所述步骤（a）包括第一子步骤（i），其中通过第一步骤中的IGMP帧将预定ONT注册到多播组，第二子步骤 子步骤（11），其中OLT向多播组分配多播端口ID和向多播组注册的ONT。 另外，步骤（b）包括：第一子步骤（i），其中OLT将多播端口ID分配给从路由器发送到多播组的消息，并发送该消息，以及第二子步骤（ii） 其中属于OLT的ONT通过分配给ONT的端口ID来过滤分配了多播端口ID的消息。