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公开(公告)号:US10777738B2
公开(公告)日:2020-09-15
申请号:US16576039
申请日:2019-09-19
Applicant: Everspin Technologies, Inc.
Inventor: Sanjeev Aggarwal , Sarin A. Deshpande , Kerry Joseph Nagel
Abstract: A method of fabricating a magnetoresistive bit from a magnetoresistive stack includes etching through a first portion of the magnetoresistive stack using a first etch process to form one or more sidewalls. At least a portion of the sidewalls includes redeposited material after the etching. The method also includes modifying at least a portion of the redeposited material on the sidewalls, and etching through a second portion of the magnetoresistive stack after the modifying step. The magnetoresistive stack may include a first magnetic region, an intermediate region disposed over the first magnetic region, and a second magnetic region disposed over the intermediate region.
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公开(公告)号:US10692926B2
公开(公告)日:2020-06-23
申请号:US16601848
申请日:2019-10-15
Applicant: Everspin Technologies, Inc.
Inventor: Jijun Sun , Sanjeev Aggarwal , Han-Jong Chia , Jon M. Slaughter , Renu Whig
Abstract: A magnetoresistive stack/structure and method of manufacturing same comprising wherein the stack/structure includes a seed region, a fixed magnetic region disposed on and in contact with the seed region, a dielectric layer(s) disposed on the fixed magnetic region and a free magnetic region disposed on the dielectric layer(s). In one embodiment, the seed region comprises an alloy including nickel and chromium having (i) a thickness greater than or equal to 40 Angstroms (+/−10%) and less than or equal to 60 Angstroms (+/−10%), and (ii) a material composition or content of chromium within a range of 25-60 atomic percent (+/−10%) or 30-50 atomic percent (+/−10%).
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公开(公告)号:US10541362B2
公开(公告)日:2020-01-21
申请号:US16380589
申请日:2019-04-10
Applicant: Everspin Technologies, Inc.
Inventor: Sarin A. Deshpande , Sanjeev Aggarwal , Moazzem Hossain
Abstract: The present disclosure is drawn to, among other things, a method of fabricating an integrated circuit device having a magnetoresistive device. In some aspects, the method includes forming the magnetoresistive device on a first contact of a substrate, wherein the magnetoresistive device includes a fixed magnetic region and a free magnetic region separated by an intermediate region; depositing a first dielectric material over the magnetoresistive device; depositing a second dielectric material over the first dielectric material; polishing a surface of the second dielectric material; forming a first cavity through the polished surface of the second dielectric material to expose a surface of the magnetoresistive device; and depositing an electrically conductive material in the first cavity to form a via.
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公开(公告)号:US10535390B2
公开(公告)日:2020-01-14
申请号:US15831736
申请日:2017-12-05
Applicant: EVERSPIN TECHNOLOGIES, INC.
Inventor: Sanjeev Aggarwal , Sarin A. Deshpande , Jon Slaughter
IPC: H01L29/82 , H01L21/8246 , H01L29/06 , H01L43/12 , H01L27/22 , B44C1/22 , G11B5/127 , H01L43/10 , G11C11/16 , H01L43/02
Abstract: The present disclosure is directed to exemplary methods of manufacturing a magnetoresistive device. In one aspect, a method may include forming one or more regions of a magnetoresistive stack on a substrate, wherein the substrate includes at least one electronic device. The method also may include performing a sole annealing process on the substrate having the one or more magnetoresistive regions formed thereon, wherein the sole annealing process is performed at a first minimum temperature. Subsequent to performing the sole annealing process, the method may include patterning or etching at least a portion of the magnetoresistive stack. Moreover, subsequent to the step of patterning or etching the portion of the magnetoresistive stack, the method may include performing all additional processing on the substrate at a second temperature below the first minimum temperature.
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公开(公告)号:US10483460B2
公开(公告)日:2019-11-19
申请号:US15337123
申请日:2016-10-28
Applicant: Everspin Technologies, Inc.
Inventor: Kerry Joseph Nagel , Wenchin Lin , Sarin A. Deshpande , Jijun Sun , Sanjeev Aggarwal , Chaitanya Mudivarthi
Abstract: A method of manufacturing a magnetoresistive stack/structure comprising etching through a second magnetic region to (i) provide sidewalls of the second magnetic region and (ii) expose a surface of a dielectric layer; depositing a first encapsulation layer on the sidewalls of the second magnetic region and over the dielectric layer; etching the first encapsulation layer which is disposed over the exposed surface of the dielectric layer. The method further includes (a) depositing a second encapsulation layer: (i) on the first encapsulation layer disposed on the sidewalls of the second magnetic region and (ii) over the exposed surface of the dielectric layer and (b) depositing a third encapsulation layer: (i) on the second encapsulation layer which is on the first encapsulation layer and the exposed surface of the dielectric layer. The method also includes etching the remaining layers of the stack/structure (via one or more etch processes).
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公开(公告)号:US10396279B2
公开(公告)日:2019-08-27
申请号:US16053072
申请日:2018-08-02
Applicant: Everspin Technologies, Inc.
Inventor: Sarin A. Deshpande , Sanjeev Aggarwal , Kerry Joseph Nagel
Abstract: A magnetoresistive-based device and method of manufacturing a magnetoresistive-based device using one or more hard masks. The process of manufacture, in one embodiment, includes patterning a mask, after patterning the mask, etching (a) through a first layer of electrically conductive material to form an electrically conductive electrode and (b) through a third layer of ferromagnetic material to provide sidewalls of the second synthetic antiferromagnetic structure. The process further includes providing insulating material on or over the sidewalls of the second synthetic antiferromagnetic structure and, thereafter, etching through (a) a second tunnel barrier layer to provide sidewalls thereof, (b) a second layer of ferromagnetic material to provide sidewalls thereof, (c) a first tunnel barrier layer to provide sidewalls thereof, and (d) a first layer of ferromagnetic material to provide sidewalls of the first synthetic antiferromagnetic structure.
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公开(公告)号:US10276789B2
公开(公告)日:2019-04-30
申请号:US15860914
申请日:2018-01-03
Applicant: EVERSPIN TECHNOLOGIES, INC.
Inventor: Renu Whig , Phillip Mather , Kenneth Smith , Sanjeev Aggarwal , Jon Slaughter , Nicholas Rizzo
Abstract: A semiconductor process integrates three bridge circuits, each include magnetoresistive sensors coupled as a Wheatstone bridge on a single chip to sense a magnetic field in three orthogonal directions. The process includes various deposition and etch steps forming the magnetoresistive sensors and a plurality of flux guides on one of the three bridge circuits for transferring a “Z” axis magnetic field onto sensors orientated in the XY plane.
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公开(公告)号:US20190123098A1
公开(公告)日:2019-04-25
申请号:US16195178
申请日:2018-11-19
Applicant: Everspin Technologies, Inc.
Inventor: Jijun SUN , Sanjeev Aggarwal , Han-Jong Chia , Jon M. Slaughter , Renu Whig
Abstract: A magnetoresistive stack/structure and method of manufacturing same comprising wherein the stack/structure includes a seed region, a fixed magnetic region disposed on and in contact with the seed region, a dielectric layer(s) disposed on the fixed magnetic region and a free magnetic region disposed on the dielectric layer(s). In one embodiment, the seed region comprises an alloy including nickel and chromium having (i) a thickness greater than or equal to 40 Angstroms (+/−10%) and less than or equal to 60 Angstroms (+/−10%), and (ii) a material composition or content of chromium within a range of 25-60 atomic percent (+/−10%) or 30-50 atomic percent (+/−10%).
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公开(公告)号:US10164176B2
公开(公告)日:2018-12-25
申请号:US15399971
申请日:2017-01-06
Applicant: Everspin Technologies, Inc.
Inventor: Kerry Joseph Nagel , Kenneth Smith , Moazzem Hossain , Sanjeev Aggarwal
IPC: H01L43/02 , H01L43/08 , H01L43/12 , H01L27/22 , H01L21/285 , H01L21/3213 , H01L21/768
Abstract: A method of manufacturing one or more interconnects to a magnetoresistive structure, the method comprising depositing a first conductive material (i) in a via which is formed through a first surface of a first dielectric layer and (ii) directly on the first surface of the first dielectric layer. The method further includes etching the first conductive material wherein, after etching the first conductive material, a portion of the first conductive material remains (i) in the via and (ii) directly on the first surface of the first dielectric layer. The method also includes partially filling the via by depositing a second conductive material (i) in the via and (ii) directly on the first conductive material remaining in the via, depositing a first electrode material (i) in the via and (ii) directly on the second conductive material which is in the via, and forming a magnetoresistive structure over the first electrode material.
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公开(公告)号:US10062839B2
公开(公告)日:2018-08-28
申请号:US15855984
申请日:2017-12-27
Applicant: Everspin Technologies, Inc.
Inventor: Sarin A. Deshpande , Sanjeev Aggarwal , Kerry Joseph Nagel
CPC classification number: H01L43/12 , G11B5/84 , G11C11/161 , H01L27/222 , H01L43/02 , H01L43/08
Abstract: A magnetoresistive-based device and method of manufacturing a magnetoresistive-based device using one or more hard masks. The process of manufacture, in one embodiment, includes patterning a mask, after patterning the mask, etching (a) through a first layer of electrically conductive material to form an electrically conductive electrode and (b) through a third layer of ferromagnetic material to provide sidewalls of the second synthetic antiferromagnetic structure. The process further includes providing insulating material on or over the sidewalls of the second synthetic antiferromagnetic structure and, thereafter, etching through (a) a second tunnel barrier layer to provide sidewalls thereof, (b) a second layer of ferromagnetic material to provide sidewalls thereof, (c) a first tunnel barrier layer to provide sidewalls thereof, and (d) a first layer of ferromagnetic material to provide sidewalls of the first synthetic antiferromagnetic structure.
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