公开(公告)号：US11690229B2

公开(公告)日：2023-06-27

申请号：US17131926

申请日：2020-12-23

Applicant: Everspin Technologies, Inc.

Inventor： Jijun Sun ,  Sanjeev Aggarwal ,  Han-Jong Chia ,  Jon M. Slaughter ,  Renu Whig

IPC: H01L27/22 ,  H01L43/02 ,  H01L43/08 ,  G11C11/16 ,  H01L43/12 ,  G11B5/39 ,  H01L43/10

CPC classification number: H01L27/222 ,  G11B5/3909 ,  G11C11/1673 ,  H01L43/02 ,  H01L43/08 ,  H01L43/10 ,  H01L43/12

Abstract: A magnetoresistive stack/structure and method of manufacturing same comprising wherein the stack/structure includes a seed region, a fixed magnetic region disposed on and in contact with the seed region, a dielectric layer(s) disposed on the fixed magnetic region and a free magnetic region disposed on the dielectric layer(s). In one embodiment, the seed region comprises an alloy including nickel and chromium having (i) a thickness greater than or equal to 40 Angstroms (+/−10%) and less than or equal to 60 Angstroms (+/−10%), and (ii) a material composition or content of chromium within a range of 25-60 atomic percent (+/−10%) or 30-50 atomic percent (+/−10%).

公开(公告)号：US09893274B2

公开(公告)日：2018-02-13

申请号：US15388650

申请日：2016-12-22

Applicant: EVERSPIN TECHNOLOGIES, INC.

Inventor： Renu Whig ,  Phillip Mather ,  Kenneth Smith ,  Sanjeev Aggarwal ,  Jon Slaughter ,  Nicholas Rizzo

IPC: H01L43/12 ,  H01L43/08 ,  H01L43/02 ,  H01L27/22 ,  G01R33/09 ,  G01R33/00

CPC classification number: H01L43/12 ,  B82Y25/00 ,  G01R33/0052 ,  G01R33/09 ,  G01R33/093 ,  G01R33/098 ,  H01L27/22 ,  H01L43/02 ,  H01L43/08

Abstract: A semiconductor process integrates three bridge circuits, each include magnetoresistive sensors coupled as a Wheatstone bridge on a single chip to sense a magnetic field in three orthogonal directions. The process includes various deposition and etch steps forming the magnetoresistive sensors and a plurality of flux guides on one of the three bridge circuits for transferring a “Z” axis magnetic field onto sensors orientated in the XY plane.

公开(公告)号：US09553261B2

公开(公告)日：2017-01-24

申请号：US15145515

申请日：2016-05-03

Applicant: EVERSPIN TECHNOLOGIES, INC.

Inventor： Renu Whig ,  Phillip Mather ,  Kenneth Smith ,  Sanjeev Aggarwal ,  Jon Slaughter ,  Nicholas Rizzo

IPC: H01L43/12 ,  H01L27/10 ,  H01L27/22 ,  H01L41/06 ,  G01R33/02 ,  B82Y25/00 ,  G01R33/00 ,  G01R33/09 ,  H01L43/08 ,  H01L43/02

CPC classification number: H01L43/12 ,  B82Y25/00 ,  G01R33/0052 ,  G01R33/09 ,  G01R33/093 ,  G01R33/098 ,  H01L27/22 ,  H01L43/02 ,  H01L43/08

Abstract: A semiconductor process integrates three bridge circuits, each include magnetoresistive sensors coupled as a Wheatstone bridge on a single chip to sense a magnetic field in three orthogonal directions. The process includes various deposition and etch steps forming the magnetoresistive sensors and a plurality of flux guides on one of the three bridge circuits for transferring a “Z” axis magnetic field onto sensors orientated in the XY plane.

Abstract translation: 半导体工艺集成了三个桥接电路，每个电路包括在单个芯片上作为惠斯登电桥耦合的磁阻传感器，以在三个正交方向上感测磁场。 该过程包括形成磁阻传感器的各种沉积和蚀刻步骤以及在三个桥接电路中的一个上的多个通量引导器，用于将“Z”轴磁场传送到在XY平面中定向的传感器上。

公开(公告)号：US20160172582A1

公开(公告)日：2016-06-16

申请号：US15043633

申请日：2016-02-15

Applicant: Everspin Technologies, Inc.

Inventor： Renu Whig ,  Jason Janesky ,  Nicholas Rizzo ,  Jon Slaughter ,  Dimitri Houssameddine

IPC: H01L43/02 ,  H01L43/08 ,  H01L43/10 ,  H01L27/22

CPC classification number: H01L43/02 ,  B82Y10/00 ,  H01L27/222 ,  H01L43/08 ,  H01L43/10 ,  H01L43/12 ,  Y10S977/935

Abstract: A magnetoresistive memory array including a plurality of magnetoresistive memory elements wherein each magnetoresistive memory element comprises a free layer including at least one ferromagnetic layer having perpendicular magnetic anisotropy, a fixed layer, and a tunnel barrier, disposed between and in contact with the free and fixed layers. The tunnel barrier includes a first metal-oxide layer, having a thickness between 1 and 10 Angstroms, a second metal-oxide layer, having a thickness between 3 and 6 Angstroms, disposed on the first metal-oxide layer, and a third metal-oxide layer, having a thickness between 3 and 6 Angstroms, disposed over the second metal-oxide layer. In one embodiment, the third metal-oxide layer is in contact with the free layer or fixed layer. The tunnel barrier may also include a fourth metal-oxide layer, having a thickness between 1 and 10 Angstroms, disposed between the second and third metal-oxide layers.

Abstract translation: 一种包括多个磁阻存储元件的磁阻存储器阵列，其中每个磁阻存储元件包括自由层，该自由层包括至少一个具有垂直磁各向异性的铁磁层，固定层和隧道势垒，该自由层设置在自由和固定 层。 隧道势垒包括设置在第一金属氧化物层上的第一金属氧化物层，其厚度为1至10埃，厚度为3埃至6埃的第二金属氧化物层，以及第三金属氧化物层， 氧化物层，其厚度为3埃至6埃，设置在第二金属氧化物层上。 在一个实施例中，第三金属氧化物层与自由层或固定层接触。 隧道势垒还可以包括设置在第二和第三金属氧化物层之间的厚度在1埃和10埃之间的第四金属氧化物层。

公开(公告)号：US11758823B2

公开(公告)日：2023-09-12

申请号：US16188934

申请日：2018-11-13

Applicant: Everspin Technologies, Inc.

Inventor： Jijun Sun ,  Jon Slaughter ,  Renu Whig

IPC: H01L43/02 ,  H10N50/80 ,  G11C11/16 ,  H10B61/00 ,  H10N50/01 ,  H10N50/10 ,  H10N50/85

CPC classification number: H10N50/80 ,  G11C11/161 ,  H10B61/22 ,  H10N50/01 ,  H10N50/10 ,  H10N50/85

Abstract: A magnetically free region of magnetoresistive device includes at least a first ferromagnetic region and a second ferromagnetic region separated by a non-magnetic insertion region. At least one of the first ferromagnetic region and the second ferromagnetic region may include at least a boron-rich ferromagnetic layer positioned proximate a boron-free ferromagnetic layer.

公开(公告)号：US11678584B2

公开(公告)日：2023-06-13

申请号：US17245882

申请日：2021-04-30

Applicant: EVERSPIN TECHNOLOGIES, INC.

Inventor： Renu Whig ,  Phillip Mather ,  Kenneth Smith ,  Sanjeev Aggarwal ,  Jon Slaughter ,  Nicholas Rizzo

IPC: H10N50/01 ,  B82Y25/00 ,  G01R33/00 ,  G01R33/09 ,  H10B61/00 ,  H10N59/00 ,  H10N50/10 ,  H10N50/80

CPC classification number: H10N50/01 ,  B82Y25/00 ,  G01R33/0052 ,  G01R33/09 ,  G01R33/093 ,  G01R33/098 ,  H10B61/00 ,  H10N50/10 ,  H10N50/80 ,  H10N59/00

Abstract: A semiconductor process integrates three bridge circuits, each include magnetoresistive sensors coupled as a Wheatstone bridge on a single chip to sense a magnetic field in three orthogonal directions. The process includes various deposition and etch steps forming the magnetoresistive sensors and a plurality of flux guides on one of the three bridge circuits for transferring a “Z” axis magnetic field onto sensors orientated in the XY plane.

公开(公告)号：US10707410B2

公开(公告)日：2020-07-07

申请号：US16225670

申请日：2018-12-19

Applicant: Everspin Technologies, Inc.

Inventor： Srinivas V. Pietambaram ,  Bengt J. Akerman ,  Renu Whig ,  Jason A. Janesky ,  Nicholas D. Rizzo ,  Jon M. Slaughter

IPC: H01L43/08 ,  H01L43/10 ,  H01L43/02 ,  G11C11/16 ,  H01L27/22

Abstract: A magnetoresistive magnetic tunnel junction (MTJ) stack includes a free magnetic region, a fixed magnetic region, and a dielectric layer positioned between the free magnetic region and the fixed magnetic region. In one aspect, the fixed magnetic region consists essentially of an unpinned, fixed synthetic anti-ferromagnetic (SAF) structure which comprises (i) a first layer of one or more ferromagnetic materials, including cobalt, (ii) a multi-layer region including a plurality of layers of ferromagnetic materials, wherein the plurality of layers of ferromagnetic materials include a layer of one or more ferromagnetic materials including cobalt, and (iii) an anti-ferromagnetic coupling layer disposed between the first layer and the multi-layer region. The free magnetic region may include a circular shape, the one or more ferromagnetic materials of the first layer may include cobalt, iron and boron, and the dielectric layer may be disposed on the first layer.

公开(公告)号：US10347828B2

公开(公告)日：2019-07-09

申请号：US16230031

申请日：2018-12-21

Applicant: EVERSPIN TECHNOLOGIES, INC.

Inventor： Renu Whig ,  Jijun Sun ,  Nicholas Rizzo ,  Jon Slaughter ,  Dimitri Houssameddine ,  Frederick Mancoff

IPC: H01L27/108 ,  H01L43/12 ,  G11C11/16 ,  H01L43/10 ,  H01L43/08 ,  H01L43/02

Abstract: A magnetoresistive element (e.g., a spin-torque magnetoresistive memory element) includes a fixed magnetic layer, a free magnetic layer, having a high-iron alloy interface region located along a surface of the free magnetic layer, wherein the high-iron alloy interface region has at least 50% iron by atomic composition, and a first dielectric, disposed between the fixed magnetic layer and the free magnetic layer. The magnetoresistive element further includes a second dielectric, having a first surface that is in contact with the surface of the free magnetic layer, and an electrode, disposed between the second dielectric and a conductor. The electrode includes: (i) a non-ferromagnetic portion having a surface that is in contact with a second surface of the second dielectric, and (ii) a second portion having at least one ferromagnetic material disposed between the non-ferromagnetic portion of the electrode and the conductor.

公开(公告)号：US20180226574A1

公开(公告)日：2018-08-09

申请号：US15941153

申请日：2018-03-30

Applicant: Everspin Technologies, Inc.

Inventor： Renu Whig ,  Jijun Sun ,  Nicholas Rizzo ,  Jon Slaughter ,  Dimitri Houssameddine ,  Frederick Mancoff

IPC: H01L43/12 ,  G11C11/16 ,  H01L43/10 ,  H01L43/08 ,  H01L43/02

CPC classification number: H01L43/12 ,  G11C11/161 ,  H01L43/02 ,  H01L43/08 ,  H01L43/10

Abstract: A magnetoresistive element (e.g., a spin-torque magnetoresistive memory element) includes a fixed magnetic layer, a free magnetic layer, having a high-iron alloy interface region located along a surface of the free magnetic layer, wherein the high-iron alloy interface region has at least 50% iron by atomic composition, and a first dielectric, disposed between the fixed magnetic layer and the free magnetic layer. The magnetoresistive element further includes a second dielectric, having a first surface that is in contact with the surface of the free magnetic layer, and an electrode, disposed between the second dielectric and a conductor. The electrode includes: (i) a non-ferromagnetic portion having a surface that is in contact with a second surface of the second dielectric, and (ii) a second portion having at least one ferromagnetic material disposed between the non-ferromagnetic portion of the electrode and the conductor.

公开(公告)号：US09269891B2

公开(公告)日：2016-02-23

申请号：US13972637

申请日：2013-08-21

Applicant: EverSpin Technologies, Inc.

Inventor： Renu Whig ,  Philip Mather ,  Kenneth Smith ,  Sanjeev Aggarwal ,  Jon Slaughter ,  Nicholas Rizzo

IPC: H01L43/12 ,  B82Y25/00 ,  G01R33/00 ,  G01R33/09 ,  H01L27/22

CPC classification number: H01L43/12 ,  B82Y25/00 ,  G01R33/0052 ,  G01R33/09 ,  G01R33/093 ,  G01R33/098 ,  H01L27/22 ,  H01L43/02 ,  H01L43/08

Abstract: A semiconductor process integrates three bridge circuits, each include magnetoresistive sensors coupled as a Wheatstone bridge on a single chip to sense a magnetic field in three orthogonal directions. The process includes various deposition and etch steps forming the magnetoresistive sensors and a plurality of flux guides on one of the three bridge circuits for transferring a “Z” axis magnetic field onto sensors orientated in the XY plane.

Abstract translation: 半导体工艺集成了三个桥接电路，每个电路包括在单个芯片上作为惠斯登电桥耦合的磁阻传感器，以在三个正交方向上感测磁场。 该过程包括形成磁阻传感器的各种沉积和蚀刻步骤以及在三个桥接电路中的一个上的多个通量引导器，用于将“Z”轴磁场传送到在XY平面中定向的传感器上。