公开(公告)号：US09954163B2

公开(公告)日：2018-04-24

申请号：US14712130

申请日：2015-05-14

Applicant: Everspin Technologies, Inc.

Inventor： Wenchin Lin ,  Jason Janesky

IPC: H01L29/82 ,  H01L43/02 ,  H01L27/22 ,  H01L43/12 ,  H01L23/14 ,  G11C5/00 ,  H01L23/552 ,  G11C11/16 ,  H01L23/00 ,  H01L23/13 ,  H01L23/498

CPC classification number: H01L43/02 ,  G11C5/005 ,  G11C11/16 ,  H01L23/13 ,  H01L23/14 ,  H01L23/49816 ,  H01L23/49838 ,  H01L23/552 ,  H01L24/06 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/83 ,  H01L24/85 ,  H01L24/92 ,  H01L27/222 ,  H01L43/12 ,  H01L2224/04042 ,  H01L2224/06136 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/33181 ,  H01L2224/45015 ,  H01L2224/4824 ,  H01L2224/49175 ,  H01L2224/73215 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/85203 ,  H01L2224/85205 ,  H01L2224/92147 ,  H01L2924/00014 ,  H01L2924/1441 ,  H01L2924/15311 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2924/207

Abstract: Structures and methods are disclosed for shielding magnetically sensitive components. One structure includes a substrate, a bottom shield deposited on the substrate, a magnetoresistive semiconductor device having a first surface and a second surface opposing the first surface, the first surface of the magnetoresistive semiconductor device deposited on the bottom shield, a top shield deposited on the second surface of the magnetoresistive semiconductor device, the top shield having a window for accessing the magnetoresistive semiconductor device, and a plurality of interconnects that connect the magnetoresistive semiconductor device to a plurality of conductive elements.

公开(公告)号：US11088317B2

公开(公告)日：2021-08-10

申请号：US15923842

申请日：2018-03-16

Applicant: Everspin Technologies, Inc.

Inventor： Wenchin Lin ,  Jason Janesky

IPC: H01L43/02 ,  H01L27/22 ,  H01L23/14 ,  H01L43/12 ,  G11C5/00 ,  H01L23/552 ,  H01L23/13 ,  H01L23/498 ,  G11C11/16 ,  H01L23/00

Abstract: Structures and methods are disclosed for shielding magnetically sensitive components. One structure includes a substrate, a bottom shield deposited on the substrate, a magnetoresistive semiconductor device having a first surface and a second surface opposing the first surface, the first surface of the magnetoresistive semiconductor device deposited on the bottom shield, a top shield deposited on the second surface of the magnetoresistive semiconductor device, the top shield having a window for accessing the magnetoresistive semiconductor device, and a plurality of interconnects that connect the magnetoresistive semiconductor device to a plurality of conductive elements.

公开(公告)号：US10483460B2

公开(公告)日：2019-11-19

申请号：US15337123

申请日：2016-10-28

Applicant: Everspin Technologies, Inc.

Inventor： Kerry Joseph Nagel ,  Wenchin Lin ,  Sarin A. Deshpande ,  Jijun Sun ,  Sanjeev Aggarwal ,  Chaitanya Mudivarthi

IPC: H01L43/12 ,  G11C11/16 ,  H01L43/08

Abstract: A method of manufacturing a magnetoresistive stack/structure comprising etching through a second magnetic region to (i) provide sidewalls of the second magnetic region and (ii) expose a surface of a dielectric layer; depositing a first encapsulation layer on the sidewalls of the second magnetic region and over the dielectric layer; etching the first encapsulation layer which is disposed over the exposed surface of the dielectric layer. The method further includes (a) depositing a second encapsulation layer: (i) on the first encapsulation layer disposed on the sidewalls of the second magnetic region and (ii) over the exposed surface of the dielectric layer and (b) depositing a third encapsulation layer: (i) on the second encapsulation layer which is on the first encapsulation layer and the exposed surface of the dielectric layer. The method also includes etching the remaining layers of the stack/structure (via one or more etch processes).

公开(公告)号：US20170125663A1

公开(公告)日：2017-05-04

申请号：US15337123

申请日：2016-10-28

Applicant: Everspin Technologies, Inc.

Inventor： Kerry Joseph Nagel ,  Wenchin Lin ,  Sarin A. Deshpande ,  Jijun Sun ,  Sanjeev Aggarwal ,  Chaitanya Mudivarthi

IPC: H01L43/02 ,  H01L27/22 ,  H01L43/12 ,  H01L43/08 ,  H01L43/10

CPC classification number: H01L43/12 ,  G11C11/161 ,  G11C2211/5615 ,  H01L43/08

Abstract: A method of manufacturing a magnetoresistive stack/structure comprising etching through a second magnetic region to (i) provide sidewalls of the second magnetic region and (ii) expose a surface of a dielectric layer; depositing a first encapsulation layer on the sidewalls of the second magnetic region and over the dielectric layer; etching the first encapsulation layer which is disposed over the exposed surface of the dielectric layer. The method further includes (a) depositing a second encapsulation layer: (i) on the first encapsulation layer disposed on the sidewalls of the second magnetic region and (ii) over the exposed surface of the dielectric layer and (b) depositing a third encapsulation layer: (i) on the second encapsulation layer which is on the first encapsulation layer and the exposed surface of the dielectric layer. The method also includes etching the remaining layers of the stack/structure (via one or more etch processes).